[clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)

[Henry Linjamäki via cfe-commits]

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@@ -83,30 +83,32 @@ class Triple {
     sparcv9,     // Sparcv9: Sparcv9
     sparcel,     // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
     systemz,     // SystemZ: s390x
-    tce,         // TCE (http://tce.cs.tut.fi/): tce
-    tcele,       // TCE little endian (http://tce.cs.tut.fi/): tcele
-    thumb,       // Thumb (little endian): thumb, thumbv.*
-    thumbeb,     // Thumb (big endian): thumbeb
-    x86,         // X86: i[3-9]86
-    x86_64,      // X86-64: amd64, x86_64
-    xcore,       // XCore: xcore
-    xtensa,      // Tensilica: Xtensa
-    nvptx,       // NVPTX: 32-bit
-    nvptx64,     // NVPTX: 64-bit
-    amdil,       // AMDIL
-    amdil64,     // AMDIL with 64-bit pointers
-    hsail,       // AMD HSAIL
-    hsail64,     // AMD HSAIL with 64-bit pointers
-    spir,        // SPIR: standard portable IR for OpenCL 32-bit version
-    spir64,      // SPIR: standard portable IR for OpenCL 64-bit version
-    spirv,       // SPIR-V with logical memory layout.
-    spirv32,     // SPIR-V with 32-bit pointers
-    spirv64,     // SPIR-V with 64-bit pointers
-    kalimba,     // Kalimba: generic kalimba
-    shave,       // SHAVE: Movidius vector VLIW processors
-    lanai,       // Lanai: Lanai 32-bit
-    wasm32,      // WebAssembly with 32-bit pointers
-    wasm64,      // WebAssembly with 64-bit pointers
+    tce,         // OpenASIP (http://openasip.org) / big endian 32b targets: tce
+    tcele, // OpenASIP (http://openasip.org) / little endian 32b targets: tcele
+    tcele64, // OpenASIP (http://openasip.org) / little endian 64b targets:
+             // tcele
+    thumb,   // Thumb (little endian): thumb, thumbv.*
+    thumbeb, // Thumb (big endian): thumbeb
+    x86,     // X86: i[3-9]86
+    x86_64,  // X86-64: amd64, x86_64
+    xcore,   // XCore: xcore
+    xtensa,  // Tensilica: Xtensa
+    nvptx,   // NVPTX: 32-bit
+    nvptx64, // NVPTX: 64-bit
+    amdil,   // AMDIL
+    amdil64, // AMDIL with 64-bit pointers
+    hsail,   // AMD HSAIL
+    hsail64, // AMD HSAIL with 64-bit pointers
+    spir,    // SPIR: standard portable IR for OpenCL 32-bit version
+    spir64,  // SPIR: standard portable IR for OpenCL 64-bit version
+    spirv,   // SPIR-V with logical memory layout.
+    spirv32, // SPIR-V with 32-bit pointers
+    spirv64, // SPIR-V with 64-bit pointers
+    kalimba, // Kalimba: generic kalimba
+    shave,   // SHAVE: Movidius vector VLIW processors
+    lanai,   // Lanai: Lanai 32-bit
+    wasm32,  // WebAssembly with 32-bit pointers
+    wasm64,  // WebAssembly with 64-bit pointers
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linehill wrote:

Probably should preserve the indentation of comments.

https://github.com/llvm/llvm-project/pull/176698