[clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)

[Krzysztof Drewniak via cfe-commits]

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@@ -368,12 +368,15 @@ enum CPol {
   GLC = 1,
   SLC = 2,
   DLC = 4,
+  SWZ_pregfx12 = 8,
   SCC = 16,
+  ASYNC_pregfx12 = 32,
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krzysz00 wrote:

Metadata wouldn't have worked because metadata needs to be erasable.

Now, I do think that if we want to do this properly, we make an `i1` immarg for whether an operation is async and autoupgrade in a value of `false`. I'd also say we may want to retroactively do that for `volatile` so that we can get non-hardware bits out of CPol. (I'm just not volunteering to write that code right now)

https://github.com/llvm/llvm-project/pull/173259