[clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)

[Pierre van Houtryve via cfe-commits]

================
@@ -368,12 +368,15 @@ enum CPol {
   GLC = 1,
   SLC = 2,
   DLC = 4,
+  SWZ_pregfx12 = 8,
   SCC = 16,
+  ASYNC_pregfx12 = 32,
----------------
Pierre-vh wrote:

Have you considered using a MMO flag instead ?

I think this ship has sailed, but I don't like that CPol has been turned into a half HW bits, half compiler information tracking utility.
If we'd like to keep using it this way we should really refactor it a bit at some point so the documentation is accurate, and there is a clear way to tell "fake" from "HW" bits apart.

https://github.com/llvm/llvm-project/pull/173259