[clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)
Pengcheng Wang via cfe-commits
cfe-commits at lists.llvm.org
Sat Jan 3 20:02:10 PST 2026
================
@@ -761,6 +761,37 @@ def SPACEMIT_X60 : RISCVProcessorModel<"spacemit-x60",
let MImpID = 0x1000000049772200;
}
+def SPACEMIT_X100 : RISCVProcessorModel<"spacemit-x100",
+ NoSchedModel,
+ !listconcat(RVA23S64Features,
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wangpc-pp wrote:
Use `RVA23U64Features`?
https://github.com/llvm/llvm-project/pull/173988
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