[clang] [CIR][AArch64] Add lowering for `svlen` builtins (1/2) (PR #172346)

[Andrzej Warzyński via cfe-commits]

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@@ -41,6 +53,16 @@ CIRGenFunction::emitAArch64SVEBuiltinExpr(unsigned builtinID,
     return mlir::Value{};
   }
 
+  mlir::Location loc = getLoc(expr->getExprLoc());
+  // Generate vscale * scalingFactor
+  auto vscaleTimesFactor = [&](int32_t scalingFactor) {
+    StringRef intrinsicName = "vscale.i64";
+    auto vscale = emitIntrinsicCallOp(builder, loc, intrinsicName,
+                                      convertType(expr->getType()));
+    return builder.createMul(loc, vscale,
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banach-space wrote:

Apologies, that's my sloppiness, thanks for catching this!

https://github.com/llvm/llvm-project/pull/172346