[clang] [CIR][X86] Implement convert_half builtins (PR #171615)
Priyanshu Kumar via cfe-commits
cfe-commits at lists.llvm.org
Wed Dec 10 08:39:20 PST 2025
https://github.com/Priyanshu3820 updated https://github.com/llvm/llvm-project/pull/171615
>From 2faec1394b8af173e845399c212f1ad4a28efd70 Mon Sep 17 00:00:00 2001
From: Priyanshu3820 <10b.priyanshu at gmail.com>
Date: Wed, 10 Dec 2025 18:34:52 +0530
Subject: [PATCH 1/6] Implement convert_half builtin
---
clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 40 ++++++++++++--
clang/test/CIR/CodeGen/X86/cir-convert-half.c | 55 +++++++++++++++++++
2 files changed, 89 insertions(+), 6 deletions(-)
create mode 100644 clang/test/CIR/CodeGen/X86/cir-convert-half.c
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
index fb17e31bf36d6..75022d4f93d4a 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
@@ -1514,12 +1514,40 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
case X86::BI__builtin_ia32_cmpnltsd:
case X86::BI__builtin_ia32_cmpnlesd:
case X86::BI__builtin_ia32_cmpordsd:
- case X86::BI__builtin_ia32_vcvtph2ps_mask:
- case X86::BI__builtin_ia32_vcvtph2ps256_mask:
- case X86::BI__builtin_ia32_vcvtph2ps512_mask:
- case X86::BI__builtin_ia32_cvtneps2bf16_128_mask:
- case X86::BI__builtin_ia32_cvtneps2bf16_256_mask:
- case X86::BI__builtin_ia32_cvtneps2bf16_512_mask:
+ cgm.errorNYI(expr->getSourceRange(),
+ std::string("unimplemented X86 builtin call: ") +
+ getContext().BuiltinInfo.getName(builtinID));
+ return {};
+ case X86::BI__builtin_ia32_vcvtph2ps_mask: {
+ mlir::Location loc = getLoc(expr->getExprLoc());
+ return emitIntrinsicCallOp(builder, loc, "x86.avx512.mask.vcvtph2ps.128",
+ convertType(expr->getType()), ops);
+ }
+ case X86::BI__builtin_ia32_vcvtph2ps256_mask: {
+ mlir::Location loc = getLoc(expr->getExprLoc());
+ return emitIntrinsicCallOp(builder, loc, "x86.avx512.mask.vcvtph2ps.256",
+ convertType(expr->getType()), ops);
+ }
+ case X86::BI__builtin_ia32_vcvtph2ps512_mask: {
+ mlir::Location loc = getLoc(expr->getExprLoc());
+ return emitIntrinsicCallOp(builder, loc, "x86.avx512.mask.vcvtph2ps.512",
+ convertType(expr->getType()), ops);
+ }
+ case X86::BI__builtin_ia32_cvtneps2bf16_128_mask: {
+ mlir::Location loc = getLoc(expr->getExprLoc());
+ return emitIntrinsicCallOp(builder, loc, "x86.avx512bf16.mask.cvtneps2bf16.128",
+ convertType(expr->getType()), ops);
+ }
+ case X86::BI__builtin_ia32_cvtneps2bf16_256_mask: {
+ mlir::Location loc = getLoc(expr->getExprLoc());
+ return emitIntrinsicCallOp(builder, loc, "x86.avx512bf16.cvtneps2bf16.256",
+ convertType(expr->getType()), ops);
+ }
+ case X86::BI__builtin_ia32_cvtneps2bf16_512_mask: {
+ mlir::Location loc = getLoc(expr->getExprLoc());
+ return emitIntrinsicCallOp(builder, loc, "x86.avx512bf16.cvtneps2bf16.512",
+ convertType(expr->getType()), ops);
+ }
case X86::BI__cpuid:
case X86::BI__cpuidex:
case X86::BI__emul:
diff --git a/clang/test/CIR/CodeGen/X86/cir-convert-half.c b/clang/test/CIR/CodeGen/X86/cir-convert-half.c
new file mode 100644
index 0000000000000..4fad9aa02cfc1
--- /dev/null
+++ b/clang/test/CIR/CodeGen/X86/cir-convert-half.c
@@ -0,0 +1,55 @@
+// Test X86-specific convert_half builtins (4-argument form)
+
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -fclangir -emit-cir %s -o - | FileCheck --check-prefix=CIR %s
+
+typedef float __m512 __attribute__((__vector_size__(64), __aligned__(64)));
+typedef float __m256 __attribute__((__vector_size__(32), __aligned__(32)));
+typedef float __m128 __attribute__((__vector_size__(16), __aligned__(16)));
+typedef int __m256i __attribute__((__vector_size__(32), __aligned__(32)));
+typedef int __m128i __attribute__((__vector_size__(16), __aligned__(16)));
+typedef int __mmask16;
+typedef unsigned char __mmask8;
+typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32)));
+typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));
+
+// Test for __builtin_ia32_vcvtph2ps512_mask
+__m512 test_vcvtph2ps512_mask(__m256i a, __m512 src, __mmask16 k, __m512 passthru) {
+ return __builtin_ia32_vcvtph2ps512_mask(a, src, k, passthru);
+}
+// CIR-LABEL: cir.func {{.*}}@test_vcvtph2ps512_mask
+// CIR: cir.call @llvm.x86.avx512.mask.vcvtph2ps.512
+
+// Test for __builtin_ia32_vcvtph2ps256_mask
+__m256 test_vcvtph2ps256_mask(__m128i a, __m256 src, __mmask8 k, __m256 passthru) {
+ return __builtin_ia32_vcvtph2ps256_mask(a, src, k, passthru);
+}
+// CIR-LABEL: cir.func {{.*}}@test_vcvtph2ps256_mask
+// CIR: cir.call @llvm.x86.avx512.mask.vcvtph2ps.256
+
+// Test for __builtin_ia32_vcvtph2ps_mask
+__m128 test_vcvtph2ps_mask(__m128i a, __m128 src, __mmask8 k, __m128 passthru) {
+ return __builtin_ia32_vcvtph2ps_mask(a, src, k, passthru);
+}
+// CIR-LABEL: cir.func {{.*}}@test_vcvtph2ps_mask
+// CIR: cir.call @llvm.x86.avx512.mask.vcvtph2ps.128
+
+// Test for __builtin_ia32_cvtneps2bf16_512_mask
+__m256bh test_cvtneps2bf16_512_mask(__m512 a, __m256bh w, __mmask16 u, __m256bh passthru) {
+ return __builtin_ia32_cvtneps2bf16_512_mask(a, w, u, passthru);
+}
+// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_512_mask
+// CIR: cir.call @llvm.x86.avx512bf16.cvtneps2bf16.512
+
+// Test for __builtin_ia32_cvtneps2bf16_256_mask
+__m128bh test_cvtneps2bf16_256_mask(__m256 a, __m128bh w, __mmask8 u, __m128bh passthru) {
+ return __builtin_ia32_cvtneps2bf16_256_mask(a, w, u, passthru);
+}
+// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_256_mask
+// CIR: cir.call @llvm.x86.avx512bf16.cvtneps2bf16.256
+
+// Test for __builtin_ia32_cvtneps2bf16_128_mask
+__m128bh test_cvtneps2bf16_128_mask(__m128 a, __m128bh w, __mmask8 u, __m128bh passthru) {
+ return __builtin_ia32_cvtneps2bf16_128_mask(a, w, u, passthru);
+}
+// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_128_mask
+// CIR: cir.call @llvm.x86.avx512bf16.mask.cvtneps2bf16.128
\ No newline at end of file
>From 9e1eea0329553346c490411e87c2083495b341b9 Mon Sep 17 00:00:00 2001
From: Priyanshu3820 <10b.priyanshu at gmail.com>
Date: Wed, 10 Dec 2025 20:15:22 +0530
Subject: [PATCH 2/6] Update clang/test/CIR/CodeGen/X86/cir-convert-half.c
---
clang/test/CIR/CodeGen/X86/cir-convert-half.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/clang/test/CIR/CodeGen/X86/cir-convert-half.c b/clang/test/CIR/CodeGen/X86/cir-convert-half.c
index 4fad9aa02cfc1..e8214af399e7e 100644
--- a/clang/test/CIR/CodeGen/X86/cir-convert-half.c
+++ b/clang/test/CIR/CodeGen/X86/cir-convert-half.c
@@ -1,4 +1,4 @@
-// Test X86-specific convert_half builtins (4-argument form)
+// Test X86-specific convert_half builtins (correct argument count)
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -fclangir -emit-cir %s -o - | FileCheck --check-prefix=CIR %s
@@ -48,8 +48,9 @@ __m128bh test_cvtneps2bf16_256_mask(__m256 a, __m128bh w, __mmask8 u, __m128bh p
// CIR: cir.call @llvm.x86.avx512bf16.cvtneps2bf16.256
// Test for __builtin_ia32_cvtneps2bf16_128_mask
-__m128bh test_cvtneps2bf16_128_mask(__m128 a, __m128bh w, __mmask8 u, __m128bh passthru) {
- return __builtin_ia32_cvtneps2bf16_128_mask(a, w, u, passthru);
+__m128bh test_cvtneps2bf16_128_mask(__m128 a, __m128bh w, __mmask8 u) {
+ // Only 3 arguments for this builtin
+ return __builtin_ia32_cvtneps2bf16_128_mask(a, w, u);
}
// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_128_mask
// CIR: cir.call @llvm.x86.avx512bf16.mask.cvtneps2bf16.128
\ No newline at end of file
>From 6867663a6491455581695820430a7e14407cf6e2 Mon Sep 17 00:00:00 2001
From: Priyanshu3820 <10b.priyanshu at gmail.com>
Date: Wed, 10 Dec 2025 20:22:39 +0530
Subject: [PATCH 3/6] Update clang/test/CIR/CodeGen/X86/cir-convert-half.c
---
clang/test/CIR/CodeGen/X86/cir-convert-half.c | 49 +++++++------------
1 file changed, 18 insertions(+), 31 deletions(-)
diff --git a/clang/test/CIR/CodeGen/X86/cir-convert-half.c b/clang/test/CIR/CodeGen/X86/cir-convert-half.c
index e8214af399e7e..7376080e3f5ea 100644
--- a/clang/test/CIR/CodeGen/X86/cir-convert-half.c
+++ b/clang/test/CIR/CodeGen/X86/cir-convert-half.c
@@ -1,4 +1,4 @@
-// Test X86-specific convert_half builtins (correct argument count)
+// Test X86-specific convert_half builtins (all with 3 arguments)
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -fclangir -emit-cir %s -o - | FileCheck --check-prefix=CIR %s
@@ -12,45 +12,32 @@ typedef unsigned char __mmask8;
typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32)));
typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));
-// Test for __builtin_ia32_vcvtph2ps512_mask
-__m512 test_vcvtph2ps512_mask(__m256i a, __m512 src, __mmask16 k, __m512 passthru) {
- return __builtin_ia32_vcvtph2ps512_mask(a, src, k, passthru);
+// CIR-LABEL: cir.func @test_vcvtph2ps512_mask
+__m512 test_vcvtph2ps512_mask(__m256i a, __m512 src, __mmask16 k) {
+ return __builtin_ia32_vcvtph2ps512_mask(a, src, k);
}
-// CIR-LABEL: cir.func {{.*}}@test_vcvtph2ps512_mask
-// CIR: cir.call @llvm.x86.avx512.mask.vcvtph2ps.512
-// Test for __builtin_ia32_vcvtph2ps256_mask
-__m256 test_vcvtph2ps256_mask(__m128i a, __m256 src, __mmask8 k, __m256 passthru) {
- return __builtin_ia32_vcvtph2ps256_mask(a, src, k, passthru);
+// CIR-LABEL: cir.func @test_vcvtph2ps256_mask
+__m256 test_vcvtph2ps256_mask(__m128i a, __m256 src, __mmask8 k) {
+ return __builtin_ia32_vcvtph2ps256_mask(a, src, k);
}
-// CIR-LABEL: cir.func {{.*}}@test_vcvtph2ps256_mask
-// CIR: cir.call @llvm.x86.avx512.mask.vcvtph2ps.256
-// Test for __builtin_ia32_vcvtph2ps_mask
-__m128 test_vcvtph2ps_mask(__m128i a, __m128 src, __mmask8 k, __m128 passthru) {
- return __builtin_ia32_vcvtph2ps_mask(a, src, k, passthru);
+// CIR-LABEL: cir.func @test_vcvtph2ps_mask
+__m128 test_vcvtph2ps_mask(__m128i a, __m128 src, __mmask8 k) {
+ return __builtin_ia32_vcvtph2ps_mask(a, src, k);
}
-// CIR-LABEL: cir.func {{.*}}@test_vcvtph2ps_mask
-// CIR: cir.call @llvm.x86.avx512.mask.vcvtph2ps.128
-// Test for __builtin_ia32_cvtneps2bf16_512_mask
-__m256bh test_cvtneps2bf16_512_mask(__m512 a, __m256bh w, __mmask16 u, __m256bh passthru) {
- return __builtin_ia32_cvtneps2bf16_512_mask(a, w, u, passthru);
+// CIR-LABEL: cir.func @test_cvtneps2bf16_512_mask
+__m256bh test_cvtneps2bf16_512_mask(__m512 a, __m256bh w, __mmask16 u) {
+ return __builtin_ia32_cvtneps2bf16_512_mask(a, w, u);
}
-// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_512_mask
-// CIR: cir.call @llvm.x86.avx512bf16.cvtneps2bf16.512
-// Test for __builtin_ia32_cvtneps2bf16_256_mask
-__m128bh test_cvtneps2bf16_256_mask(__m256 a, __m128bh w, __mmask8 u, __m128bh passthru) {
- return __builtin_ia32_cvtneps2bf16_256_mask(a, w, u, passthru);
+// CIR-LABEL: cir.func @test_cvtneps2bf16_256_mask
+__m128bh test_cvtneps2bf16_256_mask(__m256 a, __m128bh w, __mmask8 u) {
+ return __builtin_ia32_cvtneps2bf16_256_mask(a, w, u);
}
-// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_256_mask
-// CIR: cir.call @llvm.x86.avx512bf16.cvtneps2bf16.256
-// Test for __builtin_ia32_cvtneps2bf16_128_mask
+// CIR-LABEL: cir.func @test_cvtneps2bf16_128_mask
__m128bh test_cvtneps2bf16_128_mask(__m128 a, __m128bh w, __mmask8 u) {
- // Only 3 arguments for this builtin
return __builtin_ia32_cvtneps2bf16_128_mask(a, w, u);
-}
-// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_128_mask
-// CIR: cir.call @llvm.x86.avx512bf16.mask.cvtneps2bf16.128
\ No newline at end of file
+}
\ No newline at end of file
>From 496ea2d36321a78c9bec8f36e7eb51bc1830122c Mon Sep 17 00:00:00 2001
From: Priyanshu3820 <10b.priyanshu at gmail.com>
Date: Wed, 10 Dec 2025 21:25:12 +0530
Subject: [PATCH 4/6] Fix formatting
---
clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
index 75022d4f93d4a..9839301e63813 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
@@ -1535,7 +1535,8 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
}
case X86::BI__builtin_ia32_cvtneps2bf16_128_mask: {
mlir::Location loc = getLoc(expr->getExprLoc());
- return emitIntrinsicCallOp(builder, loc, "x86.avx512bf16.mask.cvtneps2bf16.128",
+ return emitIntrinsicCallOp(builder, loc,
+ "x86.avx512bf16.mask.cvtneps2bf16.128",
convertType(expr->getType()), ops);
}
case X86::BI__builtin_ia32_cvtneps2bf16_256_mask: {
>From afc3727d2793d73adb56e2e5b9a239559b41af9a Mon Sep 17 00:00:00 2001
From: Priyanshu3820 <10b.priyanshu at gmail.com>
Date: Wed, 10 Dec 2025 21:34:09 +0530
Subject: [PATCH 5/6] Move test to clang\test\CIR\CodeGenBuiltins\X86"
---
.../CodeGenBuiltins/X86/cir-convert-half.c | 84 +++++++++++++++++++
1 file changed, 84 insertions(+)
create mode 100644 clang/test/CIR/CodeGenBuiltins/X86/cir-convert-half.c
diff --git a/clang/test/CIR/CodeGenBuiltins/X86/cir-convert-half.c b/clang/test/CIR/CodeGenBuiltins/X86/cir-convert-half.c
new file mode 100644
index 0000000000000..8c6837a2e4e4a
--- /dev/null
+++ b/clang/test/CIR/CodeGenBuiltins/X86/cir-convert-half.c
@@ -0,0 +1,84 @@
+// Test X86-specific convert_half builtins
+
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -fclangir -emit-cir %s -o %t.cir
+// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -fclangir -emit-llvm %s -o %t-cir.ll
+// RUN: FileCheck --check-prefix=LLVM --input-file=%t-cir.ll %s
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -emit-llvm %s -o %t.ll
+// RUN: FileCheck --check-prefix=OGCG --input-file=%t.ll %s
+
+typedef float __m512 __attribute__((__vector_size__(64), __aligned__(64)));
+typedef float __m256 __attribute__((__vector_size__(32), __aligned__(32)));
+typedef float __m128 __attribute__((__vector_size__(16), __aligned__(16)));
+typedef int __m256i __attribute__((__vector_size__(32), __aligned__(32)));
+typedef int __m128i __attribute__((__vector_size__(16), __aligned__(16)));
+typedef int __mmask16;
+typedef unsigned char __mmask8;
+typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32)));
+typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));
+
+// Test __builtin_ia32_vcvtph2ps512_mask
+__m512 test_vcvtph2ps512_mask(__m256i a, __m512 src, __mmask16 k) {
+ return __builtin_ia32_vcvtph2ps512_mask(a, src, k);
+}
+// CIR-LABEL: cir.func {{.*}}@test_vcvtph2ps512_mask
+// CIR: cir.call @llvm.x86.avx512.mask.vcvtph2ps.512
+// LLVM-LABEL: define {{.*}} @test_vcvtph2ps512_mask
+// LLVM: call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512
+// OGCG-LABEL: define {{.*}} @test_vcvtph2ps512_mask
+// OGCG: call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512
+
+// Test __builtin_ia32_vcvtph2ps256_mask
+__m256 test_vcvtph2ps256_mask(__m128i a, __m256 src, __mmask8 k) {
+ return __builtin_ia32_vcvtph2ps256_mask(a, src, k);
+}
+// CIR-LABEL: cir.func {{.*}}@test_vcvtph2ps256_mask
+// CIR: cir.call @llvm.x86.avx512.mask.vcvtph2ps.256
+// LLVM-LABEL: define {{.*}} @test_vcvtph2ps256_mask
+// LLVM: call <8 x float> @llvm.x86.avx512.mask.vcvtph2ps.256
+// OGCG-LABEL: define {{.*}} @test_vcvtph2ps256_mask
+// OGCG: call <8 x float> @llvm.x86.avx512.mask.vcvtph2ps.256
+
+// Test __builtin_ia32_vcvtph2ps_mask
+__m128 test_vcvtph2ps_mask(__m128i a, __m128 src, __mmask8 k) {
+ return __builtin_ia32_vcvtph2ps_mask(a, src, k);
+}
+// CIR-LABEL: cir.func {{.*}}@test_vcvtph2ps_mask
+// CIR: cir.call @llvm.x86.avx512.mask.vcvtph2ps.128
+// LLVM-LABEL: define {{.*}} @test_vcvtph2ps_mask
+// LLVM: call <4 x float> @llvm.x86.avx512.mask.vcvtph2ps.128
+// OGCG-LABEL: define {{.*}} @test_vcvtph2ps_mask
+// OGCG: call <4 x float> @llvm.x86.avx512.mask.vcvtph2ps.128
+
+// Test __builtin_ia32_cvtneps2bf16_512_mask
+__m256bh test_cvtneps2bf16_512_mask(__m512 a, __m256bh w, __mmask16 u) {
+ return __builtin_ia32_cvtneps2bf16_512_mask(a, w, u);
+}
+// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_512_mask
+// CIR: cir.call @llvm.x86.avx512bf16.cvtneps2bf16.512
+// LLVM-LABEL: define {{.*}} @test_cvtneps2bf16_512_mask
+// LLVM: call <32 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512
+// OGCG-LABEL: define {{.*}} @test_cvtneps2bf16_512_mask
+// OGCG: call <32 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512
+
+// Test __builtin_ia32_cvtneps2bf16_256_mask
+__m128bh test_cvtneps2bf16_256_mask(__m256 a, __m128bh w, __mmask8 u) {
+ return __builtin_ia32_cvtneps2bf16_256_mask(a, w, u);
+}
+// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_256_mask
+// CIR: cir.call @llvm.x86.avx512bf16.cvtneps2bf16.256
+// LLVM-LABEL: define {{.*}} @test_cvtneps2bf16_256_mask
+// LLVM: call <16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256
+// OGCG-LABEL: define {{.*}} @test_cvtneps2bf16_256_mask
+// OGCG: call <16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256
+
+// Test __builtin_ia32_cvtneps2bf16_128_mask
+__m128bh test_cvtneps2bf16_128_mask(__m128 a, __m128bh w, __mmask8 u) {
+ return __builtin_ia32_cvtneps2bf16_128_mask(a, w, u);
+}
+// CIR-LABEL: cir.func {{.*}}@test_cvtneps2bf16_128_mask
+// CIR: cir.call @llvm.x86.avx512bf16.mask.cvtneps2bf16.128
+// LLVM-LABEL: define {{.*}} @test_cvtneps2bf16_128_mask
+// LLVM: call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128
+// OGCG-LABEL: define {{.*}} @test_cvtneps2bf16_128_mask
+// OGCG: call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128
\ No newline at end of file
>From 0411ce1792bb8b6ce0d6b75f9d1c05aff7391654 Mon Sep 17 00:00:00 2001
From: Priyanshu3820 <10b.priyanshu at gmail.com>
Date: Wed, 10 Dec 2025 22:05:14 +0530
Subject: [PATCH 6/6] Update test
---
clang/test/CIR/CodeGen/X86/cir-convert-half.c | 43 -------------------
1 file changed, 43 deletions(-)
delete mode 100644 clang/test/CIR/CodeGen/X86/cir-convert-half.c
diff --git a/clang/test/CIR/CodeGen/X86/cir-convert-half.c b/clang/test/CIR/CodeGen/X86/cir-convert-half.c
deleted file mode 100644
index 7376080e3f5ea..0000000000000
--- a/clang/test/CIR/CodeGen/X86/cir-convert-half.c
+++ /dev/null
@@ -1,43 +0,0 @@
-// Test X86-specific convert_half builtins (all with 3 arguments)
-
-// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -fclangir -emit-cir %s -o - | FileCheck --check-prefix=CIR %s
-
-typedef float __m512 __attribute__((__vector_size__(64), __aligned__(64)));
-typedef float __m256 __attribute__((__vector_size__(32), __aligned__(32)));
-typedef float __m128 __attribute__((__vector_size__(16), __aligned__(16)));
-typedef int __m256i __attribute__((__vector_size__(32), __aligned__(32)));
-typedef int __m128i __attribute__((__vector_size__(16), __aligned__(16)));
-typedef int __mmask16;
-typedef unsigned char __mmask8;
-typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32)));
-typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));
-
-// CIR-LABEL: cir.func @test_vcvtph2ps512_mask
-__m512 test_vcvtph2ps512_mask(__m256i a, __m512 src, __mmask16 k) {
- return __builtin_ia32_vcvtph2ps512_mask(a, src, k);
-}
-
-// CIR-LABEL: cir.func @test_vcvtph2ps256_mask
-__m256 test_vcvtph2ps256_mask(__m128i a, __m256 src, __mmask8 k) {
- return __builtin_ia32_vcvtph2ps256_mask(a, src, k);
-}
-
-// CIR-LABEL: cir.func @test_vcvtph2ps_mask
-__m128 test_vcvtph2ps_mask(__m128i a, __m128 src, __mmask8 k) {
- return __builtin_ia32_vcvtph2ps_mask(a, src, k);
-}
-
-// CIR-LABEL: cir.func @test_cvtneps2bf16_512_mask
-__m256bh test_cvtneps2bf16_512_mask(__m512 a, __m256bh w, __mmask16 u) {
- return __builtin_ia32_cvtneps2bf16_512_mask(a, w, u);
-}
-
-// CIR-LABEL: cir.func @test_cvtneps2bf16_256_mask
-__m128bh test_cvtneps2bf16_256_mask(__m256 a, __m128bh w, __mmask8 u) {
- return __builtin_ia32_cvtneps2bf16_256_mask(a, w, u);
-}
-
-// CIR-LABEL: cir.func @test_cvtneps2bf16_128_mask
-__m128bh test_cvtneps2bf16_128_mask(__m128 a, __m128bh w, __mmask8 u) {
- return __builtin_ia32_cvtneps2bf16_128_mask(a, w, u);
-}
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