[clang] [Clang] Allow AVX/AVX512 subvector shuffles in constexpr (PR #168700)
Simon Pilgrim via cfe-commits
cfe-commits at lists.llvm.org
Wed Nov 26 05:34:28 PST 2025
================
@@ -4847,6 +4847,39 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
return interp__builtin_elementwise_triop(S, OpPC, Call,
llvm::APIntOps::fshr);
+ case X86::BI__builtin_ia32_shuf_f32x4_256:
+ case X86::BI__builtin_ia32_shuf_i32x4_256:
+ case X86::BI__builtin_ia32_shuf_f64x2_256:
+ case X86::BI__builtin_ia32_shuf_i64x2_256:
+ case X86::BI__builtin_ia32_shuf_f32x4:
+ case X86::BI__builtin_ia32_shuf_i32x4:
+ case X86::BI__builtin_ia32_shuf_f64x2:
+ case X86::BI__builtin_ia32_shuf_i64x2: {
+ // Destination and sources A, B all have the same type.
+ QualType VecQT = Call->getArg(0)->getType();
+ const auto *VecT = VecQT->castAs<VectorType>();
+ unsigned NumElems = VecT->getNumElements();
+ unsigned ElemBits = S.getASTContext().getTypeSize(VecT->getElementType());
+ constexpr unsigned LaneBits = 128u;
----------------
RKSimon wrote:
```suggestion
unsigned LaneBits = 128u;
```
https://github.com/llvm/llvm-project/pull/168700
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