[clang] [CIR][X86] Add support for `kshiftl`/`kshiftr` builtins (PR #168591)

[Andy Kaylor via cfe-commits]

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@@ -546,11 +567,51 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
   case X86::BI__builtin_ia32_kshiftliqi:
   case X86::BI__builtin_ia32_kshiftlihi:
   case X86::BI__builtin_ia32_kshiftlisi:
-  case X86::BI__builtin_ia32_kshiftlidi:
+  case X86::BI__builtin_ia32_kshiftlidi: {
+    unsigned shiftVal =
+        ops[1].getDefiningOp<cir::ConstantOp>().getIntValue().getZExtValue() &
+        0xff;
+    auto numElems = cast<cir::IntType>(ops[0].getType()).getWidth();
+
+    if (shiftVal >= numElems)
+      return builder.getNullValue(ops[0].getType(), getLoc(expr->getExprLoc()));
+
+    mlir::Value in = getMaskVecValue(*this, expr, ops[0], numElems);
+
+    SmallVector<int64_t, 64> indices;
+    for (auto i : llvm::seq<unsigned>(0, numElems))
+      indices.push_back(numElems + i - shiftVal);
+
+    mlir::Value zero =
+        builder.getNullValue(in.getType(), getLoc(expr->getExprLoc()));
+    mlir::Value sv =
+        builder.createVecShuffle(getLoc(expr->getExprLoc()), zero, in, indices);
+    return builder.createBitcast(sv, ops[0].getType());
+  }
   case X86::BI__builtin_ia32_kshiftriqi:
   case X86::BI__builtin_ia32_kshiftrihi:
   case X86::BI__builtin_ia32_kshiftrisi:
-  case X86::BI__builtin_ia32_kshiftridi:
+  case X86::BI__builtin_ia32_kshiftridi: {
+    unsigned shiftVal =
+        ops[1].getDefiningOp<cir::ConstantOp>().getIntValue().getZExtValue() &
+        0xff;
+    auto numElems = cast<cir::IntType>(ops[0].getType()).getWidth();
----------------
andykaylor wrote:

No `auto` here.

https://github.com/llvm/llvm-project/pull/168591