[clang] [llvm] [AMDGPU] Match bitsin(typeof(x)) - popcnt(x) to s_bcnt0_i32 (PR #164847)

[Patrick Simmons via cfe-commits]

================
@@ -1884,6 +1886,13 @@ def : GCNPat <
      (S_MOV_B32 (i32 0)), sub1))
 >;
 
+def : GCNPat <
+   (i64 (UniformBinFrag<sub> 64, (ctpop i64:$src))),
+    (i64 (REG_SEQUENCE SReg_64,
+     (i32 (COPY_TO_REGCLASS (S_BCNT0_I32_B64 $src), SReg_32)), sub0,
----------------
linuxrocks123 wrote:

@arsenm this patch:

```
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -1889,7 +1889,7 @@ def : GCNPat <
 def : GCNPat <
    (i64 (UniformBinFrag<sub> 64, (ctpop i64:$src))),
     (i64 (REG_SEQUENCE SReg_64,
-     (i32 (COPY_TO_REGCLASS (S_BCNT0_I32_B64 $src), SReg_32)), sub0,
+     (S_BCNT0_I32_B64 $src), sub0,
      (S_MOV_B32 (i32 0)), sub1))
 >;
```

Causes this problem:
```
llc: /home/psimmons/work/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp:667: void llvm::InstrEmitter::EmitRegSequence(llvm::SDNode*, VRBaseMapType&, bool, bool): Assertion `(NumOps & 1) == 1 && "REG_SEQUENCE must have an odd number of operands!"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
0.	Program arguments: llc -mtriple=amdgcn -mcpu=gfx900
1.	Running pass 'CallGraph Pass Manager' on module '<stdin>'.
2.	Running pass 'AMDGPU DAG->DAG Pattern Instruction Selection' on function '@bcnt064_ctpop_multiple_uses'
```

So, I guess it's still necessary?

https://github.com/llvm/llvm-project/pull/164847