[clang] [RISCV] Set __GCC_CONSTRUCTIVE_SIZE/__GCC_DESTRUCTIVE_SIZE to 64 for riscv64 (PR #162986)

[Philip Reames via cfe-commits]

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@@ -178,6 +174,10 @@ class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo {
     resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128");
   }
 
+  std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
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preames wrote:

Are even rv32 machines going to have 32 byte cache lines?  I'd expect 64 to be pretty common.  Should we consider making this 64 for both rv32 and rv64?

https://github.com/llvm/llvm-project/pull/162986