[clang] [clang][RISCV] Add big-endian RISC-V target support (PR #165599)

[Craig Topper via cfe-commits]

================
@@ -255,6 +255,8 @@ class LLVM_LIBRARY_VISIBILITY FreeBSDTargetInfo : public OSTargetInfo<Target> {
       break;
     case llvm::Triple::loongarch64:
     case llvm::Triple::riscv64:
+    case llvm::Triple::riscv32be:
----------------
topperc wrote:

Why is riscv32be here, but riscv32 isn't?

https://github.com/llvm/llvm-project/pull/165599