[clang] [RISCV] Set __GCC_CONSTRUCTIVE_SIZE/__GCC_DESTRUCTIVE_SIZE to 64 for riscv64 (PR #162986)

Pengcheng Wang via cfe-commits cfe-commits at lists.llvm.org
Sat Oct 11 02:39:56 PDT 2025


https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/162986

These two macros were added in https://github.com/llvm/llvm-project/pull/89446.

But the values may not be reasonable for RV64 systems because most
of them have a cache line size 64B.


>From 5ec2f2588f651ce34388b61c4bc752909a481d23 Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: Sat, 11 Oct 2025 17:32:34 +0800
Subject: [PATCH] [RISCV] Set __GCC_CONSTRUCTIVE_SIZE/__GCC_DESTRUCTIVE_SIZE to
 64 for riscv64

These two macros were added in https://github.com/llvm/llvm-project/pull/89446.

But the values may not be reasonable for RV64 systems because most
of them have a cache line size 64B.
---
 clang/lib/Basic/Targets/RISCV.h      | 12 ++++++++----
 clang/test/Preprocessor/init-riscv.c | 12 ++++++++++++
 2 files changed, 20 insertions(+), 4 deletions(-)
 create mode 100644 clang/test/Preprocessor/init-riscv.c

diff --git a/clang/lib/Basic/Targets/RISCV.h b/clang/lib/Basic/Targets/RISCV.h
index d8b0e64c90dd6..215f82f65d8ef 100644
--- a/clang/lib/Basic/Targets/RISCV.h
+++ b/clang/lib/Basic/Targets/RISCV.h
@@ -125,10 +125,6 @@ class RISCVTargetInfo : public TargetInfo {
   ParsedTargetAttr parseTargetAttr(StringRef Str) const override;
   llvm::APInt getFMVPriority(ArrayRef<StringRef> Features) const override;
 
-  std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
-    return std::make_pair(32, 32);
-  }
-
   bool supportsCpuSupports() const override { return getTriple().isOSLinux(); }
   bool supportsCpuIs() const override { return getTriple().isOSLinux(); }
   bool supportsCpuInit() const override { return getTriple().isOSLinux(); }
@@ -178,6 +174,10 @@ class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo {
     resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128");
   }
 
+  std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
+    return std::make_pair(32, 32);
+  }
+
   bool setABI(const std::string &Name) override {
     if (Name == "ilp32e") {
       ABI = Name;
@@ -208,6 +208,10 @@ class LLVM_LIBRARY_VISIBILITY RISCV64TargetInfo : public RISCVTargetInfo {
     resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
   }
 
+  std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
+    return std::make_pair(64, 64);
+  }
+
   bool setABI(const std::string &Name) override {
     if (Name == "lp64e") {
       ABI = Name;
diff --git a/clang/test/Preprocessor/init-riscv.c b/clang/test/Preprocessor/init-riscv.c
new file mode 100644
index 0000000000000..36b2b5a06b8c6
--- /dev/null
+++ b/clang/test/Preprocessor/init-riscv.c
@@ -0,0 +1,12 @@
+// REQUIRES: riscv-registered-target
+
+// RUN: %clang_cc1 -E -dM -triple=riscv32 < /dev/null | \
+// RUN:     FileCheck -match-full-lines -check-prefixes=RV32 %s
+// RUN: %clang_cc1 -E -dM -triple=riscv64 < /dev/null | \
+// RUN:     FileCheck -match-full-lines -check-prefixes=RV64 %s
+
+// RV32: #define __GCC_CONSTRUCTIVE_SIZE 32
+// RV32: #define __GCC_DESTRUCTIVE_SIZE 32
+
+// RV64: #define __GCC_CONSTRUCTIVE_SIZE 64
+// RV64: #define __GCC_DESTRUCTIVE_SIZE 64
\ No newline at end of file



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