[clang] [CIR] Implement handling for VectorType with size 3 (PR #161232)

[Andy Kaylor via cfe-commits]

andykaylor wrote:

> To the extend of supporting the same llvm output as OG, are you suggesting we should emit different LLVM? Or that OG also needs to be fixed?

Regardless of what we do here, I'd like to see the handling of vector-3 loads and stores clarified in the LLVM Language Reference. As for what we do in CIR, I was thinking maybe we could initially annotate the vector-3 loads and stores with some attribute indicating that a vector-4 load and store with a poison element is permitted/expected. If a similar extension were done in LLVM IR, this would lower naturally to a masked load/store on targets that support that, but assuming there will at least be a time before that happens in LLVM IR, I would say we could transform such an operation to the form proposed in this PR during LoweringPrepare.



https://github.com/llvm/llvm-project/pull/161232