[clang] [HIP][SPIRV] Enable the SPIRV backend instead of the translator through an experimental flag. (PR #162282)

[Manuel Carrasco via cfe-commits]

https://github.com/mgcarrasco updated https://github.com/llvm/llvm-project/pull/162282

>From e89ce89521602f651495cf936e016d8f0c926974 Mon Sep 17 00:00:00 2001
From: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: Tue, 7 Oct 2025 06:05:21 -0700
Subject: [PATCH] [HIP][SPIRV] Enable the SPIRV backend instead of the
 translator through an experimental flag.
MIME-Version: 1.0
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Co-authored-by: Juan Manuel Martinez Caamaño <juamarti at amd.com>
---
 clang/include/clang/Driver/Options.td        | 14 ++++++++
 clang/lib/Driver/ToolChains/HIPAMD.cpp       | 36 +++++++++++++++-----
 clang/test/Driver/amdgpu-spirv-backend-opt.c | 12 +++++++
 3 files changed, 53 insertions(+), 9 deletions(-)
 create mode 100644 clang/test/Driver/amdgpu-spirv-backend-opt.c

diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
index ec38231f906eb..37dbb820ce22f 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -5483,6 +5483,20 @@ defm wavefrontsize64 : SimpleMFlag<"wavefrontsize64",
 defm amdgpu_precise_memory_op
     : SimpleMFlag<"amdgpu-precise-memory-op", "Enable", "Disable",
                   " precise memory mode (AMDGPU only)">;
+def amdgpu_use_experimental_spirv_backend
+    : Flag<["-"], "amdgpu-use-experimental-spirv-backend">,
+      Group<m_amdgpu_Features_Group>,
+      Flags<[HelpHidden]>,
+      Visibility<[ClangOption]>,
+      HelpText<"Use experimental SPIRV backend for AMDGPU compilation (AMDGPU "
+               "only)">;
+def no_amdgpu_use_experimental_spirv_backend
+    : Flag<["-"], "no-amdgpu-use-experimental-spirv-backend">,
+      Group<m_amdgpu_Features_Group>,
+      Flags<[HelpHidden]>,
+      Visibility<[ClangOption]>,
+      HelpText<"Do not use experimental SPIRV backend for AMDGPU compilation "
+               "(AMDGPU only)">;
 
 def munsafe_fp_atomics : Flag<["-"], "munsafe-fp-atomics">,
   Visibility<[ClangOption, CC1Option, FlangOption, FC1Option]>, Alias<fatomic_ignore_denormal_mode>;
diff --git a/clang/lib/Driver/ToolChains/HIPAMD.cpp b/clang/lib/Driver/ToolChains/HIPAMD.cpp
index c0c8afec07264..aeccf381c7a63 100644
--- a/clang/lib/Driver/ToolChains/HIPAMD.cpp
+++ b/clang/lib/Driver/ToolChains/HIPAMD.cpp
@@ -175,15 +175,33 @@ void AMDGCN::Linker::constructLinkAndEmitSpirvCommand(
 
   constructLlvmLinkCommand(C, JA, Inputs, LinkedBCFile, Args);
 
-  // Emit SPIR-V binary.
-  llvm::opt::ArgStringList TrArgs{
-      "--spirv-max-version=1.6",
-      "--spirv-ext=+all",
-      "--spirv-allow-unknown-intrinsics",
-      "--spirv-lower-const-expr",
-      "--spirv-preserve-auxdata",
-      "--spirv-debug-info-version=nonsemantic-shader-200"};
-  SPIRV::constructTranslateCommand(C, *this, JA, Output, LinkedBCFile, TrArgs);
+  bool UseSPIRVBackend = Args.hasFlag(
+      options::OPT_amdgpu_use_experimental_spirv_backend,
+      options::OPT_no_amdgpu_use_experimental_spirv_backend, /*Default=*/false);
+
+  // Emit SPIR-V binary either using the SPIRV backend or the translator.
+  if (UseSPIRVBackend) {
+    llvm::opt::ArgStringList CmdArgs;
+    const char *Triple =
+        C.getArgs().MakeArgString("-triple=spirv64-amd-amdhsa");
+    CmdArgs.append({"-cc1", Triple, "-emit-obj", LinkedBCFile.getFilename(),
+                    "-o", Output.getFilename()});
+    const char *Exec = getToolChain().getDriver().getClangProgramPath();
+    C.addCommand(std::make_unique<Command>(JA, *this,
+                                           ResponseFileSupport::None(), Exec,
+                                           CmdArgs, LinkedBCFile, Output));
+  } else {
+    // Use the SPIRV translator for code gen.
+    llvm::opt::ArgStringList TrArgs{
+        "--spirv-max-version=1.6",
+        "--spirv-ext=+all",
+        "--spirv-allow-unknown-intrinsics",
+        "--spirv-lower-const-expr",
+        "--spirv-preserve-auxdata",
+        "--spirv-debug-info-version=nonsemantic-shader-200"};
+    SPIRV::constructTranslateCommand(C, *this, JA, Output, LinkedBCFile,
+                                     TrArgs);
+  }
 }
 
 // For amdgcn the inputs of the linker job are device bitcode and output is
diff --git a/clang/test/Driver/amdgpu-spirv-backend-opt.c b/clang/test/Driver/amdgpu-spirv-backend-opt.c
new file mode 100644
index 0000000000000..0435ad9dad6d1
--- /dev/null
+++ b/clang/test/Driver/amdgpu-spirv-backend-opt.c
@@ -0,0 +1,12 @@
+// COM: This test case validates the behavior of -amdgpu-use-experimental-spirv-backend
+
+// COM: Test that -amdgpu-use-experimental-spirv-backend calls clang -cc1 with the SPIRV triple.
+// RUN: %clang -x hip %s --cuda-device-only --offload-arch=amdgcnspirv -amdgpu-use-experimental-spirv-backend -nogpuinc -nogpulib -### 2>&1 | FileCheck %s --check-prefix=CHECK-SPIRV-BACKEND
+// CHECK-SPIRV-BACKEND: "{{.*}}clang{{.*}}" "-cc1" "{{.*-triple=spirv64-amd-amdhsa}}"
+
+// COM: Test that -no-amdgpu-use-experimental-spirv-backend calls the SPIRV translator
+// RUN: %clang -x hip %s --cuda-device-only --offload-arch=amdgcnspirv -no-amdgpu-use-experimental-spirv-backend -nogpuinc -nogpulib -### 2>&1 | FileCheck %s --check-prefix=CHECK-SPIRV-TRANSLATOR
+// CHECK-SPIRV-TRANSLATOR: "{{.*llvm-spirv.*}}" "{{--spirv-max-version=[0-9]+\.[0-9]}}"
+
+// COM: Test that by default we use the translator
+// RUN: %clang -x hip %s --cuda-device-only --offload-arch=amdgcnspirv -nogpuinc -nogpulib -### 2>&1 | FileCheck %s --check-prefix=CHECK-SPIRV-TRANSLATOR