[clang] [X86] Allow PSHUFD/PSHUFLW/PSHUFW intrinsics in constexpr. (PR #161210)
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Wed Oct 1 04:21:20 PDT 2025
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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,c -- clang/lib/AST/ByteCode/InterpBuiltin.cpp clang/lib/AST/ExprConstant.cpp clang/test/CodeGen/X86/avx2-builtins.c clang/test/CodeGen/X86/avx512bw-builtins.c clang/test/CodeGen/X86/avx512f-builtins.c clang/test/CodeGen/X86/avx512vl-builtins.c clang/test/CodeGen/X86/avx512vlbw-builtins.c clang/test/CodeGen/X86/mmx-builtins.c clang/test/CodeGen/X86/sse2-builtins.c
``````````
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View the diff from clang-format here.
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``````````diff
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 6532547c6..4d8611391 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2775,33 +2775,34 @@ static bool interp__builtin_blend(InterpState &S, CodePtr OpPC,
enum class Half { None, Low, High };
-static bool interp__builtin_ia32_pshuf(InterpState &S, CodePtr OpPC, const CallExpr *Call,
- Half whichHalf) {
+static bool interp__builtin_ia32_pshuf(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, Half whichHalf) {
assert(Call->getNumArgs() == 2 && "masked forms handled via select*");
APSInt ControlImm = popToAPSInt(S, Call->getArg(1));
const Pointer &Src = S.Stk.pop<Pointer>();
const Pointer &Dst = S.Stk.peek<Pointer>();
unsigned NumElems = Dst.getNumElems();
- PrimType ElemT = Dst.getFieldDesc()->getPrimType();
+ PrimType ElemT = Dst.getFieldDesc()->getPrimType();
// Only i16/i32 supported
unsigned ElemBits = static_cast<unsigned>(primSize(ElemT) * 8);
- if (ElemBits != 16 && ElemBits != 32) return false;
+ if (ElemBits != 16 && ElemBits != 32)
+ return false;
// Lane: 64b for MMX, 128b otherwise
unsigned TotalBits = NumElems * ElemBits;
- unsigned LaneBits = (TotalBits == 64) ? 64u : 128u;
- unsigned LaneElts = LaneBits / ElemBits;
+ unsigned LaneBits = (TotalBits == 64) ? 64u : 128u;
+ unsigned LaneElts = LaneBits / ElemBits;
assert(LaneElts && (NumElems % LaneElts == 0));
uint8_t ctl = static_cast<uint8_t>(ControlImm.getZExtValue());
for (unsigned idx = 0; idx != NumElems; idx++) {
unsigned LaneBase = (idx / LaneElts) * LaneElts;
- unsigned LaneIdx = idx % LaneElts;
+ unsigned LaneIdx = idx % LaneElts;
- unsigned SrcIdx = idx;
+ unsigned SrcIdx = idx;
if (ElemBits == 32) {
// PSHUFD: 4×i32 per lane
diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp
index 6932c7a54..605aaf716 100644
--- a/clang/lib/AST/ExprConstant.cpp
+++ b/clang/lib/AST/ExprConstant.cpp
@@ -11615,25 +11615,29 @@ static bool evalPackBuiltin(const CallExpr *E, EvalInfo &Info, APValue &Result,
return true;
}
-
static bool evalPshufBuiltin(EvalInfo &Info, const CallExpr *Call,
unsigned ElemBits, unsigned HalfBase,
APValue &Out) {
// Expect (vec, imm8)
APValue Vec;
APSInt Imm;
- if (!EvaluateAsRValue(Info, Call->getArg(0), Vec)) return false;
- if (!EvaluateInteger(Call->getArg(1), Imm, Info)) return false;
+ if (!EvaluateAsRValue(Info, Call->getArg(0), Vec))
+ return false;
+ if (!EvaluateInteger(Call->getArg(1), Imm, Info))
+ return false;
const auto *VT = Call->getType()->getAs<VectorType>();
- if (!VT) return false;
+ if (!VT)
+ return false;
unsigned NumElts = VT->getNumElements();
- // Lane geometry: MMX pshufw is a single 64-bit lane; others use 128-bit lanes.
+ // Lane geometry: MMX pshufw is a single 64-bit lane; others use 128-bit
+ // lanes.
unsigned TotalBits = NumElts * ElemBits;
- unsigned LaneBits = (TotalBits == 64) ? 64u : 128u;
- unsigned LaneElts = LaneBits / ElemBits;
- if (!LaneElts || (NumElts % LaneElts) != 0) return false;
+ unsigned LaneBits = (TotalBits == 64) ? 64u : 128u;
+ unsigned LaneElts = LaneBits / ElemBits;
+ if (!LaneElts || (NumElts % LaneElts) != 0)
+ return false;
uint8_t ctl = static_cast<uint8_t>(Imm.getZExtValue());
@@ -11642,9 +11646,9 @@ static bool evalPshufBuiltin(EvalInfo &Info, const CallExpr *Call,
for (unsigned idx = 0; idx != NumElts; idx++) {
unsigned LaneBase = (idx / LaneElts) * LaneElts;
- unsigned LaneIdx = idx % LaneElts;
+ unsigned LaneIdx = idx % LaneElts;
- unsigned SrcIdx = idx;
+ unsigned SrcIdx = idx;
if (ElemBits == 32) {
// PSHUFD: permute 4×i32 per 128-bit lane
``````````
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https://github.com/llvm/llvm-project/pull/161210
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