[clang] [clang] VectorExprEvaluator::VisitCallExpr - add constant folding for X86 pslldqi/psrldqi intrinsics (PR #157403)
Simon Pilgrim via cfe-commits
cfe-commits at lists.llvm.org
Wed Oct 1 04:17:53 PDT 2025
================
@@ -1562,13 +1562,18 @@ __m128i test_mm_srli_si128(__m128i A) {
// CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> zeroinitializer, <16 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20>
return _mm_srli_si128(A, 5);
}
+TEST_CONSTEXPR(match_v16qi(_mm_slli_si128((__m128i)(__v16qi){1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}, 3), 0,0,0,1,2,3,4,5,6,7,8,9,10,11,12,13))
+TEST_CONSTEXPR(match_v16qi(_mm_slli_si128((__m128i)(__v16qi){1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}, 16), 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0))
__m128i test_mm_srli_si128_2(__m128i A) {
// CHECK-LABEL: test_mm_srli_si128_2
// ret <2 x i64> zeroinitializer
return _mm_srli_si128(A, 17);
}
+TEST_CONSTEXPR(match_v16qi(_mm_srli_si128((__m128i)(__v16qi){1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}, 3), 4,5,6,7,8,9,10,11,12,13,14,15,16,0,0,0))
+TEST_CONSTEXPR(match_v16qi(_mm_srli_si128((__m128i)(__v16qi){1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}, 16), 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0))
----------------
RKSimon wrote:
ALL of these tests are still failing you've missing brackets around the vector initialisations (because _mm_srli_si128 is a macro it expands early).
```
TEST_CONSTEXPR(match_v16qi(_mm_srli_si128(((__m128i)(__v16qi){1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}), 16), 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0))
```
Update all your other TEST_CONSTEXPR accordingly
https://github.com/llvm/llvm-project/pull/157403
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