[clang] [X86] Allow AVX2 per-element shift intrinsics to be used in constexpr (PR #154780)

[via cfe-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp,h,c -- clang/lib/AST/ExprConstant.cpp clang/lib/Headers/avx2intrin.h clang/test/CodeGen/X86/avx2-builtins.c
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp
index 9b934753b..261b3f490 100644
--- a/clang/lib/AST/ExprConstant.cpp
+++ b/clang/lib/AST/ExprConstant.cpp
@@ -11679,7 +11679,7 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
   case clang::X86::BI__builtin_ia32_psrlv2di:
   case clang::X86::BI__builtin_ia32_psrlv4di:
   case clang::X86::BI__builtin_ia32_psrlv4si:
-  case clang::X86::BI__builtin_ia32_psrlv8si:{
+  case clang::X86::BI__builtin_ia32_psrlv8si: {
     APValue SourceLHS, SourceRHS;
     if (!EvaluateAsRValue(Info, E->getArg(0), SourceLHS) ||
         !EvaluateAsRValue(Info, E->getArg(1), SourceRHS))
diff --git a/clang/lib/Headers/avx2intrin.h b/clang/lib/Headers/avx2intrin.h
index ce5b2b754..a23b8e0bb 100644
--- a/clang/lib/Headers/avx2intrin.h
+++ b/clang/lib/Headers/avx2intrin.h
@@ -3722,8 +3722,7 @@ _mm_maskstore_epi64(long long *__X, __m128i __M, __m128i __Y)
 ///    bits).
 /// \returns A 256-bit vector of [8 x i32] containing the result.
 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
-_mm256_sllv_epi32(__m256i __X, __m256i __Y)
-{
+_mm256_sllv_epi32(__m256i __X, __m256i __Y) {
   return (__m256i)__builtin_ia32_psllv8si((__v8si)__X, (__v8si)__Y);
 }
 
@@ -3744,8 +3743,7 @@ _mm256_sllv_epi32(__m256i __X, __m256i __Y)
 ///    bits).
 /// \returns A 128-bit vector of [4 x i32] containing the result.
 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
-_mm_sllv_epi32(__m128i __X, __m128i __Y)
-{
+_mm_sllv_epi32(__m128i __X, __m128i __Y) {
   return (__m128i)__builtin_ia32_psllv4si((__v4si)__X, (__v4si)__Y);
 }
 
@@ -3766,8 +3764,7 @@ _mm_sllv_epi32(__m128i __X, __m128i __Y)
 ///    bits).
 /// \returns A 256-bit vector of [4 x i64] containing the result.
 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
-_mm256_sllv_epi64(__m256i __X, __m256i __Y)
-{
+_mm256_sllv_epi64(__m256i __X, __m256i __Y) {
   return (__m256i)__builtin_ia32_psllv4di((__v4di)__X, (__v4di)__Y);
 }
 
@@ -3788,8 +3785,7 @@ _mm256_sllv_epi64(__m256i __X, __m256i __Y)
 ///    bits).
 /// \returns A 128-bit vector of [2 x i64] containing the result.
 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
-_mm_sllv_epi64(__m128i __X, __m128i __Y)
-{
+_mm_sllv_epi64(__m128i __X, __m128i __Y) {
   return (__m128i)__builtin_ia32_psllv2di((__v2di)__X, (__v2di)__Y);
 }
 
@@ -3811,8 +3807,7 @@ _mm_sllv_epi64(__m128i __X, __m128i __Y)
 ///    bits).
 /// \returns A 256-bit vector of [8 x i32] containing the result.
 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
-_mm256_srav_epi32(__m256i __X, __m256i __Y)
-{
+_mm256_srav_epi32(__m256i __X, __m256i __Y) {
   return (__m256i)__builtin_ia32_psrav8si((__v8si)__X, (__v8si)__Y);
 }
 
@@ -3834,8 +3829,7 @@ _mm256_srav_epi32(__m256i __X, __m256i __Y)
 ///    bits).
 /// \returns A 128-bit vector of [4 x i32] containing the result.
 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
-_mm_srav_epi32(__m128i __X, __m128i __Y)
-{
+_mm_srav_epi32(__m128i __X, __m128i __Y) {
   return (__m128i)__builtin_ia32_psrav4si((__v4si)__X, (__v4si)__Y);
 }
 
@@ -3856,8 +3850,7 @@ _mm_srav_epi32(__m128i __X, __m128i __Y)
 ///    bits).
 /// \returns A 256-bit vector of [8 x i32] containing the result.
 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
-_mm256_srlv_epi32(__m256i __X, __m256i __Y)
-{
+_mm256_srlv_epi32(__m256i __X, __m256i __Y) {
   return (__m256i)__builtin_ia32_psrlv8si((__v8si)__X, (__v8si)__Y);
 }
 
@@ -3878,8 +3871,7 @@ _mm256_srlv_epi32(__m256i __X, __m256i __Y)
 ///    bits).
 /// \returns A 128-bit vector of [4 x i32] containing the result.
 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
-_mm_srlv_epi32(__m128i __X, __m128i __Y)
-{
+_mm_srlv_epi32(__m128i __X, __m128i __Y) {
   return (__m128i)__builtin_ia32_psrlv4si((__v4si)__X, (__v4si)__Y);
 }
 
@@ -3900,8 +3892,7 @@ _mm_srlv_epi32(__m128i __X, __m128i __Y)
 ///    bits).
 /// \returns A 256-bit vector of [4 x i64] containing the result.
 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
-_mm256_srlv_epi64(__m256i __X, __m256i __Y)
-{
+_mm256_srlv_epi64(__m256i __X, __m256i __Y) {
   return (__m256i)__builtin_ia32_psrlv4di((__v4di)__X, (__v4di)__Y);
 }
 
@@ -3922,8 +3913,7 @@ _mm256_srlv_epi64(__m256i __X, __m256i __Y)
 ///    bits).
 /// \returns A 128-bit vector of [2 x i64] containing the result.
 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
-_mm_srlv_epi64(__m128i __X, __m128i __Y)
-{
+_mm_srlv_epi64(__m128i __X, __m128i __Y) {
   return (__m128i)__builtin_ia32_psrlv2di((__v2di)__X, (__v2di)__Y);
 }
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/154780