[clang] [llvm] [Driver][AMDGPU][HIP][SPIRV] Disable optimizations for AMDGCN SPIR-V (PR #154765)
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Thu Aug 21 06:49:08 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-clang-driver
Author: Alex Voicu (AlexVlx)
<details>
<summary>Changes</summary>
SPIR-V specific optimizations can inadvertently remove information that is important for the AMDGPU BE / break certain code patterns we rely on. Therefore, for AMDGCN flavoured SPIR-V we disable optimizations over IR, to ensure that we operate directly on the output of Clang CodeGen when we finalise.
---
Full diff: https://github.com/llvm/llvm-project/pull/154765.diff
4 Files Affected:
- (modified) clang/lib/Driver/ToolChains/AMDGPU.cpp (+7)
- (modified) clang/lib/Driver/ToolChains/HIPAMD.cpp (+6)
- (modified) clang/test/Driver/hip-toolchain-no-rdc.hip (+1-1)
- (modified) clang/test/Driver/spirv-amd-toolchain.c (+1-1)
``````````diff
diff --git a/clang/lib/Driver/ToolChains/AMDGPU.cpp b/clang/lib/Driver/ToolChains/AMDGPU.cpp
index 5e463b9c98687..bad1bd694b9e7 100644
--- a/clang/lib/Driver/ToolChains/AMDGPU.cpp
+++ b/clang/lib/Driver/ToolChains/AMDGPU.cpp
@@ -858,6 +858,13 @@ void AMDGPUToolChain::addClangTargetOptions(
CC1Args.push_back("-fapply-global-visibility-to-externs");
}
+ // For SPIR-V we want to retain the pristine output of Clang CodeGen, since
+ // optimizations might lose structure / information that is necessary for
+ // generating optimal concrete AMDGPU code.
+ if (getTriple().isSPIRV() &&
+ !DriverArgs.hasArg(options::OPT_disable_llvm_passes))
+ CC1Args.push_back("-disable-llvm-passes");
+
if (DeviceOffloadingKind == Action::OFK_None)
addOpenCLBuiltinsLib(getDriver(), DriverArgs, CC1Args);
}
diff --git a/clang/lib/Driver/ToolChains/HIPAMD.cpp b/clang/lib/Driver/ToolChains/HIPAMD.cpp
index b4c6da0d73d13..5f3fbea40f162 100644
--- a/clang/lib/Driver/ToolChains/HIPAMD.cpp
+++ b/clang/lib/Driver/ToolChains/HIPAMD.cpp
@@ -261,6 +261,12 @@ void HIPAMDToolChain::addClangTargetOptions(
// with options that match the user-supplied ones.
if (!DriverArgs.hasArg(options::OPT_fembed_bitcode_marker))
CC1Args.push_back("-fembed-bitcode=marker");
+ // For SPIR-V we want to retain the pristine output of Clang CodeGen, since
+ // optimizations might lose structure / information that is necessary for
+ // generating optimal concrete AMDGPU code. We duplicate this because the
+ // HIP TC doesn't invoke the base AMDGPU TC addClangTargetOptions.
+ if (!DriverArgs.hasArg(options::OPT_disable_llvm_passes))
+ CC1Args.push_back("-disable-llvm-passes");
return; // No DeviceLibs for SPIR-V.
}
diff --git a/clang/test/Driver/hip-toolchain-no-rdc.hip b/clang/test/Driver/hip-toolchain-no-rdc.hip
index ddd251b67cc57..dc8f0a97ad371 100644
--- a/clang/test/Driver/hip-toolchain-no-rdc.hip
+++ b/clang/test/Driver/hip-toolchain-no-rdc.hip
@@ -206,7 +206,7 @@
// Check mixed AMDGCNSPIRV and concrete GPU arch.
//
-// AMDGCNSPIRV: "-cc1" "-triple" "spirv64-amd-amdhsa" {{.*}}"-emit-llvm-bc" {{.*}} "-o" "[[AMDGCNSPV_BC:.*bc]]"
+// AMDGCNSPIRV: "-cc1" "-triple" "spirv64-amd-amdhsa" {{.*}}"-emit-llvm-bc" {{.*}}"-fembed-bitcode=marker" "-disable-llvm-passes" {{.*}} "-o" "[[AMDGCNSPV_BC:.*bc]]"
// AMDGCNSPIRV: {{".*llvm-link.*"}} "-o" "[[AMDGCNSPV_TMP:.*out]]" "[[AMDGCNSPV_BC]]"
// AMDGCNSPIRV: {{".*llvm-spirv.*"}} "--spirv-max-version=1.6" "--spirv-ext=+all" {{.*}} "[[AMDGCNSPV_TMP]]" {{.*}}"-o" "[[AMDGCNSPV_CO:.*out]]"
// AMDGCNSPIRV: "-cc1" "-triple" "amdgcn-amd-amdhsa" {{.*}}"-emit-obj" {{.*}}"-target-cpu" "gfx900"{{.*}} "-o" "[[GFX900_OBJ:.*o]]"
diff --git a/clang/test/Driver/spirv-amd-toolchain.c b/clang/test/Driver/spirv-amd-toolchain.c
index c9417400a9378..0c8ccd1d17487 100644
--- a/clang/test/Driver/spirv-amd-toolchain.c
+++ b/clang/test/Driver/spirv-amd-toolchain.c
@@ -14,6 +14,6 @@
// RUN: %clang -### --target=spirv64-amd-amdhsa %s -nogpulib -nogpuinc 2>&1 \
// RUN: | FileCheck %s --check-prefix=INVOCATION
-// INVOCATION: "-cc1" "-triple" "spirv64-amd-amdhsa" {{.*}} "-o" "[[OUTPUT:.+]]" "-x" "c"
+// INVOCATION: "-cc1" "-triple" "spirv64-amd-amdhsa" {{.*}}"-disable-llvm-passes" {{.*}} "-o" "[[OUTPUT:.+]]" "-x" "c"
// INVOCATION: "{{.*}}llvm-link" "-o" "a.out" "[[OUTPUT]]"
// INVOCATION: "{{.*}}llvm-spirv" "--spirv-max-version=1.6" "--spirv-ext=+all" "--spirv-allow-unknown-intrinsics" "--spirv-lower-const-expr" "--spirv-preserve-auxdata" "--spirv-debug-info-version=nonsemantic-shader-200" "a.out" "-o" "a.out"
``````````
</details>
https://github.com/llvm/llvm-project/pull/154765
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