[clang] [llvm] [RISCV] Support Base P RV32/64 Instructions (PR #150379)
via cfe-commits
cfe-commits at lists.llvm.org
Fri Aug 15 04:21:19 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: None (realqhc)
<details>
<summary>Changes</summary>
This patch supports RV32/64 extension instructions. The final patch split from the original pull request will add RV32 Only instructions with register pair operands.
Documentation:
https://jhauser.us/RISCV/ext-P/RVP-baseInstrs-014.pdf
https://jhauser.us/RISCV/ext-P/RVP-instrEncodings-015.pdf
---
Patch is 39.86 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/150379.diff
7 Files Affected:
- (modified) clang/test/Driver/print-supported-extensions-riscv.c (+1-1)
- (modified) llvm/lib/Target/RISCV/RISCVFeatures.td (+1-1)
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoP.td (+201)
- (modified) llvm/test/MC/RISCV/attribute-arch.s (+4-4)
- (modified) llvm/test/MC/RISCV/rv32p-valid.s (+275)
- (modified) llvm/test/MC/RISCV/rv64p-valid.s (+399)
- (modified) llvm/unittests/TargetParser/RISCVISAInfoTest.cpp (+1-1)
``````````diff
diff --git a/clang/test/Driver/print-supported-extensions-riscv.c b/clang/test/Driver/print-supported-extensions-riscv.c
index 2503f2473d64a..2e4d7cfa82c80 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -207,7 +207,7 @@
// CHECK-NEXT: xwchc 2.2 'Xwchc' (WCH/QingKe additional compressed opcodes)
// CHECK-EMPTY:
// CHECK-NEXT: Experimental extensions
-// CHECK-NEXT: p 0.14 'P' ('Base P' (Packed SIMD))
+// CHECK-NEXT: p 0.15 'P' ('Base P' (Packed SIMD))
// CHECK-NEXT: zicfilp 1.0 'Zicfilp' (Landing pad)
// CHECK-NEXT: zicfiss 1.0 'Zicfiss' (Shadow stack)
// CHECK-NEXT: zalasr 0.1 'Zalasr' (Load-Acquire and Store-Release Instructions)
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index a7329d201f880..2163b063610af 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -1069,7 +1069,7 @@ def HasStdExtSmctrOrSsctr : Predicate<"Subtarget->hasStdExtSmctrOrSsctr()">,
// Packed SIMD Extensions
def FeatureStdExtP
- : RISCVExperimentalExtension<0, 14,
+ : RISCVExperimentalExtension<0, 15,
"'Base P' (Packed SIMD)">;
def HasStdExtP : Predicate<"Subtarget->hasStdExtP()">,
AssemblerPredicate<(all_of FeatureStdExtP),
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
index e67417035963a..9e19ffb00c9ab 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
@@ -559,3 +559,204 @@ let Predicates = [HasStdExtP, IsRV64] in {
def PPACKT_W : RVPBinary_rr<0b0110, 0b01, 0b100, "ppackt.w">;
def PACKT_RV64 : RVPBinary_rr<0b0110, 0b11, 0b100, "packt">;
} // Predicates = [HasStdExtP, IsRV64]
+let Predicates = [HasStdExtP] in {
+ def PM2ADD_H : RVPBinary_rr<0b0000, 0b00, 0b101, "pm2add.h">;
+ def PM4ADD_B : RVPBinary_rr<0b0000, 0b10, 0b101, "pm4add.b">;
+ def PM2ADDA_H : RVPBinary_rr<0b0001, 0b00, 0b101, "pm2adda.h">;
+ def PM4ADDA_B : RVPBinary_rr<0b0001, 0b10, 0b101, "pm4adda.b">;
+ def PM2ADD_HX : RVPBinary_rr<0b0010, 0b00, 0b101, "pm2add.hx">;
+ def PM2ADDA_HX : RVPBinary_rr<0b0011, 0b00, 0b101, "pm2adda.hx">;
+
+ def PM2ADDU_H : RVPBinary_rr<0b0100, 0b00, 0b101, "pm2addu.h">;
+ def PM4ADDU_B : RVPBinary_rr<0b0100, 0b10, 0b101, "pm4addu.b">;
+ def PM2ADDAU_H : RVPBinary_rr<0b0101, 0b00, 0b101, "pm2addau.h">;
+ def PM4ADDAU_B : RVPBinary_rr<0b0101, 0b10, 0b101, "pm4addau.b">;
+ def PMQ2ADD_H : RVPBinary_rr<0b0110, 0b00, 0b101, "pmq2add.h">;
+ def PMQR2ADD_H : RVPBinary_rr<0b0110, 0b10, 0b101, "pmqr2add.h">;
+ def PMQ2ADDA_H : RVPBinary_rr<0b0111, 0b00, 0b101, "pmq2adda.h">;
+ def PMQR2ADDA_H : RVPBinary_rr<0b0111, 0b10, 0b101, "pmqr2adda.h">;
+
+ def PM2SUB_H : RVPBinary_rr<0b1000, 0b00, 0b101, "pm2sub.h">;
+ def PM2SADD_H : RVPBinary_rr<0b1000, 0b10, 0b101, "pm2sadd.h">;
+ def PM2SUBA_H : RVPBinary_rr<0b1001, 0b00, 0b101, "pm2suba.h">;
+ def PM2SUB_HX : RVPBinary_rr<0b1010, 0b00, 0b101, "pm2sub.hx">;
+ def PM2SADD_HX : RVPBinary_rr<0b1010, 0b10, 0b101, "pm2sadd.hx">;
+ def PM2SUBA_HX : RVPBinary_rr<0b1011, 0b00, 0b101, "pm2suba.hx">;
+
+ def PM2ADDSU_H : RVPBinary_rr<0b1100, 0b00, 0b101, "pm2addsu.h">;
+ def PM4ADDSU_B : RVPBinary_rr<0b1100, 0b10, 0b101, "pm4addsu.b">;
+ def PM2ADDASU_H : RVPBinary_rr<0b1101, 0b00, 0b101, "pm2addasu.h">;
+ def PM4ADDASU_B : RVPBinary_rr<0b1101, 0b10, 0b101, "pm4addasu.b">;
+} // Predicates = [HasStdExtP]
+let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
+ def MQACC_H01 : RVPBinary_rr<0b1111, 0b00, 0b101, "mqacc.h01">;
+ def MQRACC_H01 : RVPBinary_rr<0b1111, 0b10, 0b101, "mqracc.h01">;
+} // // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only"
+let Predicates = [HasStdExtP, IsRV64] in {
+ def PM2ADD_W : RVPBinary_rr<0b0000, 0b01, 0b101, "pm2add.w">;
+ def PM4ADD_H : RVPBinary_rr<0b0000, 0b11, 0b101, "pm4add.h">;
+ def PM2ADDA_W : RVPBinary_rr<0b0001, 0b01, 0b101, "pm2adda.w">;
+ def PM4ADDA_H : RVPBinary_rr<0b0001, 0b11, 0b101, "pm4adda.h">;
+ def PM2ADD_WX : RVPBinary_rr<0b0010, 0b01, 0b101, "pm2add.wx">;
+ def PM2ADDA_WX : RVPBinary_rr<0b0011, 0b01, 0b101, "pm2adda.wx">;
+
+ def PM2ADDU_W : RVPBinary_rr<0b0100, 0b01, 0b101, "pm2addu.w">;
+ def PM4ADDU_H : RVPBinary_rr<0b0100, 0b11, 0b101, "pm4addu.h">;
+ def PM2ADDAU_W : RVPBinary_rr<0b0101, 0b01, 0b101, "pm2addau.w">;
+ def PM4ADDAU_H : RVPBinary_rr<0b0101, 0b11, 0b101, "pm4addau.h">;
+ def PMQ2ADD_W : RVPBinary_rr<0b0110, 0b01, 0b101, "pmq2add.w">;
+ def PMQR2ADD_W : RVPBinary_rr<0b0110, 0b11, 0b101, "pmqr2add.w">;
+ def PMQ2ADDA_W : RVPBinary_rr<0b0111, 0b01, 0b101, "pmq2adda.w">;
+ def PMQR2ADDA_W : RVPBinary_rr<0b0111, 0b11, 0b101, "pmqr2adda.w">;
+
+ def PM2SUB_W : RVPBinary_rr<0b1000, 0b01, 0b101, "pm2sub.w">;
+ def PM2SUBA_W : RVPBinary_rr<0b1001, 0b01, 0b101, "pm2suba.w">;
+ def PM2SUB_WX : RVPBinary_rr<0b1010, 0b01, 0b101, "pm2sub.wx">;
+ def PM2SUBA_WX : RVPBinary_rr<0b1011, 0b01, 0b101, "pm2suba.wx">;
+
+ def PM2ADDSU_W : RVPBinary_rr<0b1100, 0b01, 0b101, "pm2addsu.w">;
+ def PM4ADDSU_H : RVPBinary_rr<0b1100, 0b11, 0b101, "pm4addsu.h">;
+ def PM2ADDASU_W : RVPBinary_rr<0b1101, 0b01, 0b101, "pm2addasu.w">;
+ def PM4ADDASU_H : RVPBinary_rr<0b1101, 0b11, 0b101, "pm4addasu.h">;
+
+ def PMQACC_W_H01 : RVPBinary_rr<0b1111, 0b00, 0b101, "pmqacc.w.h01">;
+ def MQACC_W01 : RVPBinary_rr<0b1111, 0b01, 0b101, "mqacc.w01">;
+ def PMQRACC_W_H01 : RVPBinary_rr<0b1111, 0b10, 0b101, "pmqracc.w.h01">;
+ def MQRACC_W01 : RVPBinary_rr<0b1111, 0b11, 0b101, "mqracc.w01">;
+} // Predicates = [HasStdExtP, IsRV64]
+let Predicates = [HasStdExtP] in {
+ def PAS_HX : RVPBinary_rr<0b0000, 0b00, 0b110, "pas.hx">;
+ def PSA_HX : RVPBinary_rr<0b0000, 0b10, 0b110, "psa.hx">;
+ def PSAS_HX : RVPBinary_rr<0b0010, 0b00, 0b110, "psas.hx">;
+ def PSSA_HX : RVPBinary_rr<0b0010, 0b10, 0b110, "pssa.hx">;
+
+ def PMSEQ_H : RVPBinary_rr<0b1000, 0b00, 0b110, "pmseq.h">;
+ def PMSEQ_B : RVPBinary_rr<0b1000, 0b10, 0b110, "pmseq.b">;
+ def PMSLT_H : RVPBinary_rr<0b1010, 0b00, 0b110, "pmslt.h">;
+ def PMSLT_B : RVPBinary_rr<0b1010, 0b10, 0b110, "pmslt.b">;
+ def PMSLTU_H : RVPBinary_rr<0b1011, 0b00, 0b110, "pmsltu.h">;
+ def PMSLTU_B : RVPBinary_rr<0b1011, 0b10, 0b110, "pmsltu.b">;
+
+ def PMIN_H : RVPBinary_rr<0b1100, 0b00, 0b110, "pmin.h">;
+ def PMIN_B : RVPBinary_rr<0b1100, 0b10, 0b110, "pmin.b">;
+ def PMINU_H : RVPBinary_rr<0b1101, 0b00, 0b110, "pminu.h">;
+ def PMINU_B : RVPBinary_rr<0b1101, 0b10, 0b110, "pminu.b">;
+ def PMAX_H : RVPBinary_rr<0b1110, 0b00, 0b110, "pmax.h">;
+ def PMAX_B : RVPBinary_rr<0b1110, 0b10, 0b110, "pmax.b">;
+ def PMAXU_H : RVPBinary_rr<0b1111, 0b00, 0b110, "pmaxu.h">;
+ def PMAXU_B : RVPBinary_rr<0b1111, 0b10, 0b110, "pmaxu.b">;
+} // Predicates = [HasStdExtP]
+let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
+ def MSEQ : RVPBinary_rr<0b1000, 0b01, 0b110, "mseq">;
+ def MSLT : RVPBinary_rr<0b1010, 0b01, 0b110, "mslt">;
+ def MSLTU : RVPBinary_rr<0b1011, 0b01, 0b110, "msltu">;
+} // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only"
+let Predicates = [HasStdExtP, IsRV64] in {
+ def PAS_WX : RVPBinary_rr<0b0000, 0b01, 0b110, "pas.wx">;
+ def PSA_WX : RVPBinary_rr<0b0000, 0b11, 0b110, "psa.wx">;
+ def PSAS_WX : RVPBinary_rr<0b0010, 0b01, 0b110, "psas.wx">;
+ def PSSA_WX : RVPBinary_rr<0b0010, 0b11, 0b110, "pssa.wx">;
+ def PAAS_WX : RVPBinary_rr<0b0011, 0b01, 0b110, "paas.wx">;
+ def PASA_WX : RVPBinary_rr<0b0011, 0b11, 0b110, "pasa.wx">;
+
+ def PMSEQ_W : RVPBinary_rr<0b1000, 0b01, 0b110, "pmseq.w">;
+ def PMSLT_W : RVPBinary_rr<0b1010, 0b01, 0b110, "pmslt.w">;
+ def PMSLTU_W : RVPBinary_rr<0b1011, 0b01, 0b110, "pmsltu.w">;
+
+ def PMIN_W : RVPBinary_rr<0b1100, 0b01, 0b110, "pmin.w">;
+ def PMINU_W : RVPBinary_rr<0b1101, 0b01, 0b110, "pminu.w">;
+ def PMAX_W : RVPBinary_rr<0b1110, 0b01, 0b110, "pmax.w">;
+ def PMAXU_W : RVPBinary_rr<0b1111, 0b01, 0b110, "pmaxu.w">;
+} // Predicates = [HasStdExtP, IsRV64]
+
+
+let Predicates = [HasStdExtP] in {
+ def PMULH_H : RVPBinary_rr<0b0000, 0b00, 0b111, "pmulh.h">;
+ def PMULHR_H : RVPBinary_rr<0b0000, 0b10, 0b111, "pmulhr.h">;
+ def PMHACC_H : RVPBinary_rr<0b0001, 0b00, 0b111, "pmhacc.h">;
+ def PMHRACC_H : RVPBinary_rr<0b0001, 0b10, 0b111, "pmhracc.h">;
+ def PMULHU_H : RVPBinary_rr<0b0010, 0b00, 0b111, "pmulhu.h">;
+ def PMULHRU_H : RVPBinary_rr<0b0010, 0b10, 0b111, "pmulhru.h">;
+ def PMHACCU_H : RVPBinary_rr<0b0011, 0b00, 0b111, "pmhaccu.h">;
+ def PMHRACCU_H : RVPBinary_rr<0b0011, 0b10, 0b111, "pmhraccu.h">;
+
+ def PMULH_H_B0 : RVPBinary_rr<0b0100, 0b00, 0b111, "pmulh.h.b0">;
+ def PMULHSU_H_B0 : RVPBinary_rr<0b0100, 0b10, 0b111, "pmulhsu.h.b0">;
+ def PMHACCU_H_B0 : RVPBinary_rr<0b0101, 0b00, 0b111, "pmhaccu.h.b0">;
+ def PMHACCSU_H_B0 : RVPBinary_rr<0b0101, 0b10, 0b111, "pmhaccsu.h.b0">;
+ def PMULH_H_B1 : RVPBinary_rr<0b0110, 0b00, 0b111, "pmulh.h.b1">;
+ def PMULHSU_H_B1 : RVPBinary_rr<0b0110, 0b10, 0b111, "pmulhsu.h.b1">;
+ def PMHACC_H_B1 : RVPBinary_rr<0b0111, 0b00, 0b111, "pmhacc.h.b1">;
+ def PMHACCSU_H_B1 : RVPBinary_rr<0b0111, 0b10, 0b111, "pmhaccsu.h.b1">;
+
+ def PMULHSU_H : RVPBinary_rr<0b1000, 0b00, 0b111, "pmulhsu.h">;
+ def PMULHRSU_H : RVPBinary_rr<0b1000, 0b10, 0b111, "pmulhrsu.h">;
+ def PMHACCSU_H : RVPBinary_rr<0b1001, 0b00, 0b111, "pmhaccsu.h">;
+ def PMHRACCSU_H : RVPBinary_rr<0b1001, 0b10, 0b111, "pmhraccsu.h">;
+ def PMULQ_H : RVPBinary_rr<0b1010, 0b00, 0b111, "pmulq.h">;
+ def PMULQR_H : RVPBinary_rr<0b1010, 0b10, 0b111, "pmulqr.h">;
+} // Predicates = [HasStdExtP]
+
+let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
+ def MULHR : RVPBinary_rr<0b0000, 0b11, 0b111, "mulhr">;
+ def MHACC : RVPBinary_rr<0b0001, 0b01, 0b111, "mhacc">;
+ def MHRACC : RVPBinary_rr<0b0001, 0b11, 0b111, "mhracc">;
+ def MULHRU : RVPBinary_rr<0b0010, 0b11, 0b111, "mulhru">;
+ def MHACCU : RVPBinary_rr<0b0011, 0b01, 0b111, "mhaccu">;
+ def MHRACCU : RVPBinary_rr<0b0011, 0b11, 0b111, "mhraccu">;
+
+ def MULH_H0 : RVPBinary_rr<0b0100, 0b01, 0b111, "mulh.h0">;
+ def MULHSU_H0 : RVPBinary_rr<0b0100, 0b11, 0b111, "mulhsu.h0">;
+ def MHACC_H0 : RVPBinary_rr<0b0101, 0b01, 0b111, "mhacc.h0">;
+ def MHACCSU_H0 : RVPBinary_rr<0b0101, 0b11, 0b111, "mhaccsu.h0">;
+ def MULH_H1 : RVPBinary_rr<0b0110, 0b01, 0b111, "mulh.h1">;
+ def MULHSU_H1 : RVPBinary_rr<0b0110, 0b11, 0b111, "mulhsu.h1">;
+ def MHACC_H1 : RVPBinary_rr<0b0111, 0b01, 0b111, "mhacc.h1">;
+ def MHACCSU_H1 : RVPBinary_rr<0b0111, 0b11, 0b111, "mhaccsu.h1">;
+
+ def MULHRSU_H : RVPBinary_rr<0b1000, 0b11, 0b111, "mulhrsu.h">;
+ def MHACCSU : RVPBinary_rr<0b1001, 0b01, 0b111, "mhaccsu">;
+ def MHRACCSU : RVPBinary_rr<0b1001, 0b11, 0b111, "mhraccsu">;
+ def MULQ : RVPBinary_rr<0b1010, 0b01, 0b111, "mulq">;
+ def MULQR : RVPBinary_rr<0b1010, 0b11, 0b111, "mulqr">;
+
+ def MQACC_H00 : RVPBinary_rr<0b1101, 0b00, 0b111, "mqacc.h00">;
+ def MQRACC_H00 : RVPBinary_rr<0b1101, 0b10, 0b111, "mqracc.h00">;
+ def MQACC_H11 : RVPBinary_rr<0b1111, 0b00, 0b111, "mqacc.h11">;
+ def MQRACC_H11 : RVPBinary_rr<0b1111, 0b10, 0b111, "mqracc.h11">;
+} // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in
+let Predicates = [HasStdExtP, IsRV64] in {
+ def PMULH_W : RVPBinary_rr<0b0000, 0b01, 0b111, "pmulh.w">;
+ def PMULHR_W : RVPBinary_rr<0b0000, 0b11, 0b111, "pmulhr.w">;
+ def PMHACC_W : RVPBinary_rr<0b0001, 0b01, 0b111, "pmhacc.w">;
+ def PMHRACC_W : RVPBinary_rr<0b0001, 0b11, 0b111, "pmhracc.w">;
+ def PMULHU_W : RVPBinary_rr<0b0010, 0b01, 0b111, "pmulhu.w">;
+ def PMULHRU_W : RVPBinary_rr<0b0010, 0b11, 0b111, "pmulhru.w">;
+ def PMHACCU_W : RVPBinary_rr<0b0011, 0b01, 0b111, "pmhaccu.w">;
+ def PMHRACCU_W : RVPBinary_rr<0b0011, 0b11, 0b111, "pmhraccu.w">;
+
+ def PMULH_W_H0 : RVPBinary_rr<0b0100, 0b01, 0b111, "pmulh.w.h0">;
+ def PMULHSU_W_H0 : RVPBinary_rr<0b0100, 0b11, 0b111, "pmulhsu.w.h0">;
+ def PMHACC_W_H0 : RVPBinary_rr<0b0101, 0b01, 0b111, "pmhacc.w.h0">;
+ def PMHACCSU_W_H0 : RVPBinary_rr<0b0101, 0b11, 0b111, "pmhaccsu.w.h0">;
+ def PMULH_W_H1 : RVPBinary_rr<0b0110, 0b01, 0b111, "pmulh.w.h1">;
+ def PMULHSU_W_H1 : RVPBinary_rr<0b0110, 0b11, 0b111, "pmulhsu.w.h1">;
+ def PMHACC_W_H1 : RVPBinary_rr<0b0111, 0b01, 0b111, "pmhacc.w.h1">;
+ def PMHACCSU_W_H1 : RVPBinary_rr<0b0111, 0b11, 0b111, "pmhaccsu.w.h1">;
+
+ def PMULHSU_W : RVPBinary_rr<0b1000, 0b01, 0b111, "pmulhsu.w">;
+ def PMULHRSU_W : RVPBinary_rr<0b1000, 0b11, 0b111, "pmulhrsu.w">;
+ def PMHACCSU_W : RVPBinary_rr<0b1001, 0b01, 0b111, "pmhaccsu.w">;
+ def PMHRACCSU_W : RVPBinary_rr<0b1001, 0b11, 0b111, "pmhraccsu.w">;
+ def PMULQ_W : RVPBinary_rr<0b1010, 0b01, 0b111, "pmulq.w">;
+ def PMULQR_W : RVPBinary_rr<0b1010, 0b11, 0b111, "pmulqr.w">;
+
+ def PMQACC_W_H00 : RVPBinary_rr<0b1101, 0b00, 0b111, "pmqacc.w.h00">;
+ def MQACC_W00 : RVPBinary_rr<0b1101, 0b01, 0b111, "mqacc.w00">;
+ def PMQRACC_W_H00 : RVPBinary_rr<0b1101, 0b10, 0b111, "pmqracc.w.h00">;
+ def MQRACC_W00 : RVPBinary_rr<0b1101, 0b11, 0b111, "mqracc.w00">;
+ def PMQACC_W_H11 : RVPBinary_rr<0b1111, 0b00, 0b111, "pmqacc.w.h11">;
+ def MQACC_W11 : RVPBinary_rr<0b1111, 0b01, 0b111, "mqacc.w11">;
+ def PMQRACC_W_H11 : RVPBinary_rr<0b1111, 0b10, 0b111, "pmqracc.w.h11">;
+ def MQRACC_W11 : RVPBinary_rr<0b1111, 0b11, 0b111, "mqracc.w11">;
+} // Predicates = [HasStdExtP, IsRV64]
\ No newline at end of file
diff --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s
index 19cc4d5ba1675..03a8957b5b5ca 100644
--- a/llvm/test/MC/RISCV/attribute-arch.s
+++ b/llvm/test/MC/RISCV/attribute-arch.s
@@ -492,8 +492,8 @@
.attribute arch, "rv32i_sdtrig1p0"
# CHECK: attribute 5, "rv32i2p1_sdtrig1p0"
-.attribute arch, "rv32i_p0p14"
-# CHECK: attribute 5, "rv32i2p1_p0p14"
+.attribute arch, "rv32i_p0p15"
+# CHECK: attribute 5, "rv32i2p1_p0p15"
-.attribute arch, "rv64i_p0p14"
-# CHECK: attribute 5, "rv64i2p1_p0p14"
+.attribute arch, "rv64i_p0p15"
+# CHECK: attribute 5, "rv64i2p1_p0p15"
diff --git a/llvm/test/MC/RISCV/rv32p-valid.s b/llvm/test/MC/RISCV/rv32p-valid.s
index 0383e4ec1ea62..c1d5914192fad 100644
--- a/llvm/test/MC/RISCV/rv32p-valid.s
+++ b/llvm/test/MC/RISCV/rv32p-valid.s
@@ -373,3 +373,278 @@ ppackt.h t3, s0, s0
# CHECK-ASM-AND-OBJ: packt a2, t3, t1
# CHECK-ASM: encoding: [0x3b,0x46,0x6e,0xb2]
packt a2, t3, t1
+# CHECK-ASM: encoding: [0x3b,0x5e,0x83,0x80]
+pm2add.h t3, t1, s0
+# CHECK-ASM-AND-OBJ: pm4add.b t1, s2, t5
+# CHECK-ASM: encoding: [0x3b,0x53,0xe9,0x85]
+pm4add.b t1, s2, t5
+# CHECK-ASM-AND-OBJ: pm2adda.h t1, s2, a4
+# CHECK-ASM: encoding: [0x3b,0x53,0xe9,0x88]
+pm2adda.h t1, s2, a4
+# CHECK-ASM-AND-OBJ: pm4adda.b t3, a0, t5
+# CHECK-ASM: encoding: [0x3b,0x5e,0xe5,0x8d]
+pm4adda.b t3, a0, t5
+# CHECK-ASM-AND-OBJ: pm2add.hx s0, t5, a4
+# CHECK-ASM: encoding: [0x3b,0x54,0xef,0x90]
+pm2add.hx s0, t5, a4
+# CHECK-ASM-AND-OBJ: pm2adda.hx a0, a0, t1
+# CHECK-ASM: encoding: [0x3b,0x55,0x65,0x98]
+pm2adda.hx a0, a0, t1
+# CHECK-ASM-AND-OBJ: pm2addu.h s2, t5, a2
+# CHECK-ASM: encoding: [0x3b,0x59,0xcf,0xa0]
+pm2addu.h s2, t5, a2
+# CHECK-ASM-AND-OBJ: pm4addu.b t5, s0, t1
+# CHECK-ASM: encoding: [0x3b,0x5f,0x64,0xa4]
+pm4addu.b t5, s0, t1
+# CHECK-ASM-AND-OBJ: pm2addau.h t3, t1, t5
+# CHECK-ASM: encoding: [0x3b,0x5e,0xe3,0xa9]
+pm2addau.h t3, t1, t5
+# CHECK-ASM-AND-OBJ: pm4addau.b a4, t3, a0
+# CHECK-ASM: encoding: [0x3b,0x57,0xae,0xac]
+pm4addau.b a4, t3, a0
+# CHECK-ASM-AND-OBJ: pmq2add.h t1, a2, t1
+# CHECK-ASM: encoding: [0x3b,0x53,0x66,0xb0]
+pmq2add.h t1, a2, t1
+# CHECK-ASM-AND-OBJ: pmqr2add.h a2, a4, s2
+# CHECK-ASM: encoding: [0x3b,0x56,0x27,0xb5]
+pmqr2add.h a2, a4, s2
+# CHECK-ASM-AND-OBJ: pmq2adda.h a2, s2, t1
+# CHECK-ASM: encoding: [0x3b,0x56,0x69,0xb8]
+pmq2adda.h a2, s2, t1
+# CHECK-ASM-AND-OBJ: pmqr2adda.h t1, s0, a2
+# CHECK-ASM: encoding: [0x3b,0x53,0xc4,0xbc]
+pmqr2adda.h t1, s0, a2
+# CHECK-ASM-AND-OBJ: pm2sub.h t1, a0, a4
+# CHECK-ASM: encoding: [0x3b,0x53,0xe5,0xc0]
+pm2sub.h t1, a0, a4
+# CHECK-ASM-AND-OBJ: pm2sadd.h s2, s2, t3
+# CHECK-ASM: encoding: [0x3b,0x59,0xc9,0xc5]
+pm2sadd.h s2, s2, t3
+# CHECK-ASM-AND-OBJ: pm2suba.h s0, s0, t3
+# CHECK-ASM: encoding: [0x3b,0x54,0xc4,0xc9]
+pm2suba.h s0, s0, t3
+# CHECK-ASM-AND-OBJ: pm2sub.hx a2, a2, a0
+# CHECK-ASM: encoding: [0x3b,0x56,0xa6,0xd0]
+pm2sub.hx a2, a2, a0
+# CHECK-ASM-AND-OBJ: pm2sadd.hx t5, s2, a0
+# CHECK-ASM: encoding: [0x3b,0x5f,0xa9,0xd4]
+pm2sadd.hx t5, s2, a0
+# CHECK-ASM-AND-OBJ: pm2suba.hx a4, a2, t5
+# CHECK-ASM: encoding: [0x3b,0x57,0xe6,0xd9]
+pm2suba.hx a4, a2, t5
+# CHECK-ASM-AND-OBJ: pm2addsu.h s0, s0, s2
+# CHECK-ASM: encoding: [0x3b,0x54,0x24,0xe1]
+pm2addsu.h s0, s0, s2
+# CHECK-ASM-AND-OBJ: pm4addsu.b a0, s0, t3
+# CHECK-ASM: encoding: [0x3b,0x55,0xc4,0xe5]
+pm4addsu.b a0, s0, t3
+# CHECK-ASM-AND-OBJ: pm2addasu.h a4, t1, a2
+# CHECK-ASM: encoding: [0x3b,0x57,0xc3,0xe8]
+pm2addasu.h a4, t1, a2
+# CHECK-ASM-AND-OBJ: pm4addasu.b s2, s0, a2
+# CHECK-ASM: encoding: [0x3b,0x59,0xc4,0xec]
+pm4addasu.b s2, s0, a2
+# CHECK-ASM-AND-OBJ: mqacc.h01 a4, t1, a0
+# CHECK-ASM: encoding: [0x3b,0x57,0xa3,0xf8]
+mqacc.h01 a4, t1, a0
+# CHECK-ASM-AND-OBJ: mqracc.h01 s0, a0, t5
+# CHECK-ASM: encoding: [0x3b,0x54,0xe5,0xfd]
+mqracc.h01 s0, a0, t5
+# CHECK-ASM-AND-OBJ: pas.hx t5, s2, t5
+# CHECK-ASM: encoding: [0x3b,0x6f,0xe9,0x81]
+pas.hx t5, s2, t5
+# CHECK-ASM-AND-OBJ: psa.hx s0, t1, t3
+# CHECK-ASM: encoding: [0x3b,0x64,0xc3,0x85]
+psa.hx s0, t1, t3
+# CHECK-ASM-AND-OBJ: psas.hx t5, s2, a2
+# CHECK-ASM: encoding: [0x3b,0x6f,0xc9,0x90]
+psas.hx t5, s2, a2
+# CHECK-ASM-AND-OBJ: pssa.hx s2, t3, t5
+# CHECK-ASM: encoding: [0x3b,0x69,0xee,0x95]
+pssa.hx s2, t3, t5
+# CHECK-ASM-AND-OBJ: pmseq.h a0, t1, s0
+# CHECK-ASM: encoding: [0x3b,0x65,0x83,0xc0]
+pmseq.h a0, t1, s0
+# CHECK-ASM-AND-OBJ: pmseq.b s0, s2, s0
+# CHECK-ASM: encoding: [0x3b,0x64,0x89,0xc4]
+pmseq.b s0, s2, s0
+# CHECK-ASM-AND-OBJ: pmslt.h t3, a2, a4
+# CHECK-ASM: encoding: [0x3b,0x6e,0xe6,0xd0]
+pmslt.h t3, a2, a4
+# CHECK-ASM-AND-OBJ: pmslt.b t5, a4, t1
+# CHECK-ASM: encoding: [0x3b,0x6f,0x67,0xd4]
+pmslt.b t5, a4, t1
+# CHECK-ASM-AND-OBJ: pmsltu.h s2, s0, s2
+# CHECK-ASM: encoding: [0x3b,0x69,0x24,0xd9]
+pmsltu.h s2, s0, s2
+# CHECK-ASM-AND-OBJ: pmsltu.b s0, s2, t5
+# CHECK-ASM: encoding: [0x3b,0x64,0xe9,0xdd]
+pmsltu.b s0, s2, t5
+# CHECK-ASM-AND-OBJ: pmin.h s2, t3, s2
+# CHECK-ASM: encoding: [0x3b,0x69,0x2e,0xe1]
+pmin.h s2, t3, s2
+# CHECK-ASM-AND-OBJ: pmin.b a2, a2, t5
+# CHECK-ASM: encoding: [0x3b,0x66,0xe6,0xe5]
+pmin.b a2, a2, t5
+# CHECK-ASM-AND-OBJ: pminu.h a0, a4, a2
+# CHECK-ASM: encoding: [0x3b,0x65,0xc7,0xe8]
+pminu.h a0, a4, a2
+# CHECK-ASM-AND-OBJ: pminu.b a4, t3, s2
+# CHECK-ASM: encoding: [0x3b,0x67,0x2e,0xed]
+pminu.b a4, t3, s2
+# CHECK-ASM-AND-OBJ: pmax.h a4, s2, a0
+# CHECK-ASM: encoding: [0x3b,0x67,0xa9,0xf0]
+pmax.h a4, s2, a0
+# CHECK-ASM-AND-OBJ: pmax.b t1, s0, s0
+# CHECK-ASM: encoding: [0x3b,0x63,0x84,0xf4]
+pmax.b t1, s0, s0
+# CHECK-ASM-AND-OBJ: pmaxu.h a0, s0, s0
+# CHECK-ASM: encoding: [0x3b,0x65,0x84,0xf8]
+pmaxu.h a0, s0, s0
+# CHECK-ASM-AND-OBJ: pmaxu.b t3, a0, t1
+# CHECK-ASM: encoding: [0x3b,0x6e,0x65,0xfc]
+pmaxu.b t3, a0, t1
+# CHECK-ASM-AND-OBJ: mseq a4, t1, s0
+# CHECK-ASM: encoding: [0x3b,0x67,0x83,0xc2]
+mseq a4, t1, s0
+# CHECK-ASM-AND-OBJ: mslt t5, t5, t1
+# CHECK-ASM: encoding: [0x3b,0x6f,0x6f,0xd2]
+mslt t5, t5, t1
+# CHECK-ASM-AND-OBJ: msltu s2, a0, t3
+# CHECK-ASM: encoding: [0x3b,0x69,0xc5,0xdb]
+msltu s2, a0, t3
+# CHECK-ASM-AND-OBJ: pmulh.h s0, t3, t3
+# CHECK-ASM: encoding: [0x3b,0x74,0xce,0x81]
+pmulh.h s0, t3, t3
+# CHECK-ASM-AND-OBJ: pmulhr.h t1, t5, s0
+# CHECK-ASM: encoding: [0x3b,0x73,0x8f,0x84]
+pmulhr.h t1, t5, s0
+# CHECK-ASM-AND-OBJ: pmhacc.h s0, t5, s2
+# CHECK-ASM: encoding: [0x3b,0x74,0x2f,0x89]
+pmhacc.h s0, t5, s2
+# CHECK-ASM-AND-OBJ: pmhracc.h a4, t3, a2
+# CH...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/150379
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