[clang] [llvm] [RISCV] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[Craig Topper via cfe-commits]

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@@ -2742,6 +2742,9 @@ bool RISCVInstrInfo::verifyInstruction(const MachineInstr &MI,
         case RISCVOp::OPERAND_UIMM9_LSB000:
           Ok = isShiftedUInt<6, 3>(Imm);
           break;
+        case RISCVOp::OPERAND_UIMM9:
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topperc wrote:

Use `CASE_OPERAND_UIMM(9)` like the other unsigned immediates earlier in this switch

https://github.com/llvm/llvm-project/pull/145647