[clang] [CIR][NFS] Remove unnecessary constraints asserts in VecCmpOp (PR #142473)

[Amr Hesham via cfe-commits]

https://github.com/AmrDeveloper created https://github.com/llvm/llvm-project/pull/142473

We already have constraints in CIROps to make sure that the operands and result type are vectors [VecCmpOp](https://github.com/llvm/llvm-project/blob/b88dfb0b23d0a1863414fb9450ee444766bfe7c9/clang/include/clang/CIR/Dialect/IR/CIROps.td#L2149-L2151)



>From 333775705e379c5923cb1237736f9cfcb920dded Mon Sep 17 00:00:00 2001
From: AmrDeveloper <amr96 at programmer.net>
Date: Mon, 2 Jun 2025 22:03:48 +0200
Subject: [PATCH] [CIR][NFS] Remove unnecessary constraints asserts in VecCmpOp

---
 clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
index b07e61638c3b4..17a34fe568f79 100644
--- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
@@ -1836,10 +1836,6 @@ mlir::LogicalResult CIRToLLVMVecInsertOpLowering::matchAndRewrite(
 mlir::LogicalResult CIRToLLVMVecCmpOpLowering::matchAndRewrite(
     cir::VecCmpOp op, OpAdaptor adaptor,
     mlir::ConversionPatternRewriter &rewriter) const {
-  assert(mlir::isa<cir::VectorType>(op.getType()) &&
-         mlir::isa<cir::VectorType>(op.getLhs().getType()) &&
-         mlir::isa<cir::VectorType>(op.getRhs().getType()) &&
-         "Vector compare with non-vector type");
   mlir::Type elementType = elementTypeIfVector(op.getLhs().getType());
   mlir::Value bitResult;
   if (auto intType = mlir::dyn_cast<cir::IntType>(elementType)) {