[clang] dcf3c79 - [NFC][AArch64] Add relnote saying modal FP8 intrinsics now fully implemented by ACLE (#141743)

[via cfe-commits]

Author: Jonathan Thackray
Date: 2025-05-28T13:22:05+01:00
New Revision: dcf3c79c36ac0e077eee26e8bc1e55d2eb99430c

URL: https://github.com/llvm/llvm-project/commit/dcf3c79c36ac0e077eee26e8bc1e55d2eb99430c
DIFF: https://github.com/llvm/llvm-project/commit/dcf3c79c36ac0e077eee26e8bc1e55d2eb99430c.diff

LOG: [NFC][AArch64] Add relnote saying modal FP8 intrinsics now fully implemented by ACLE (#141743)

Added: 
    

Modified: 
    clang/docs/ReleaseNotes.rst

Removed: 
    


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diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index c83f135da541c..df8e035a65109 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -851,6 +851,10 @@ X86 Support
 Arm and AArch64 Support
 ^^^^^^^^^^^^^^^^^^^^^^^
 
+- Implementation of modal 8-bit floating point intrinsics in accordance with
+  the Arm C Language Extensions (ACLE)
+  `as specified here <https://github.com/ARM-software/acle/blob/main/main/acle.md#modal-8-bit-floating-point-extensions>`_
+  is now available.
 - Support has been added for the following processors (command-line identifiers in parentheses):
   - Arm Cortex-A320 (``cortex-a320``)
 - For ARM targets, cc1as now considers the FPU's features for the selected CPU or Architecture.