[clang] [llvm] [LLVM][SROA] Teach SROA how to "bitcast" between fixed and scalable vectors. (PR #130973)

[Paul Walker via cfe-commits]

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@@ -80,7 +80,9 @@ fixed_bool32_t from_vbool32_t(vbool32_t type) {
 //
 // CHECK-128-LABEL: @to_vbool32_t(
 // CHECK-128-NEXT:  entry:
-// CHECK-128-NEXT:    ret <vscale x 2 x i1> [[TYPE_COERCE:%.*]]
+// CHECK-128-NEXT:    [[SAVED_VALUE:%.*]] = alloca <1 x i8>, align 1
+// CHECK-128-NEXT:    [[SAVED_VALUE_0_SAVED_VALUE_0_SAVED_VALUE_0_SAVED_VALUE_0_:%.*]] = load <vscale x 2 x i1>, ptr [[SAVED_VALUE]], align 1, !tbaa [[TBAA10]]
+// CHECK-128-NEXT:    ret <vscale x 2 x i1> [[SAVED_VALUE_0_SAVED_VALUE_0_SAVED_VALUE_0_SAVED_VALUE_0_]]
----------------
paulwalker-arm wrote:

Here is the input to the first two iterations of SROA, with subsequent iterations being unchanged:
```
; *** IR Dump Before SROAPass on to_vbool32_t ***
; Function Attrs: nounwind vscale_range(2,2)
define dso_local <vscale x 2 x i1> @to_vbool32_t(<vscale x 2 x i1> noundef %type.coerce) #0 {
entry:
  %type = alloca <1 x i8>, align 1
  %type.addr = alloca <1 x i8>, align 1
  %saved-value = alloca <1 x i8>, align 1
  store <vscale x 2 x i1> %type.coerce, ptr %type, align 1
  %type1 = load <1 x i8>, ptr %type, align 1, !tbaa !6
  store <1 x i8> %type1, ptr %type.addr, align 1, !tbaa !6
  %0 = load <1 x i8>, ptr %type.addr, align 1, !tbaa !6
  store <1 x i8> %0, ptr %saved-value, align 1, !tbaa !6
  %1 = load <vscale x 2 x i1>, ptr %saved-value, align 1, !tbaa !6
  ret <vscale x 2 x i1> %1
}
; *** IR Dump Before SROAPass on to_vbool32_t ***
; Function Attrs: nounwind vscale_range(2,2)
define dso_local <vscale x 2 x i1> @to_vbool32_t(<vscale x 2 x i1> noundef %type.coerce) local_unnamed_addr #0 {
entry:
  %saved-value = alloca <1 x i8>, align 1
  %saved-value.0. = load <vscale x 2 x i1>, ptr %saved-value, align 1, !tbaa !6
  ret <vscale x 2 x i1> %saved-value.0.
}
```
There is a conversation above (see call_bool32_ff) where my observation is that clang generates invalid IR for these cases. Whilst not my intention it seems this PR has the side effect of not hidden such undefined behaviour.

https://github.com/llvm/llvm-project/pull/130973