[clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)

[Alex MacLean via cfe-commits]

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@@ -2381,25 +2387,38 @@ def INT_PTX_LDG_G_v4i32_ELE : VLDG_G_ELE_V4<"u32", Int32Regs>;
 def INT_PTX_LDG_G_v4f32_ELE : VLDG_G_ELE_V4<"f32", Float32Regs>;
 
 
-multiclass NG_TO_G<string Str> {
-   def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
-          "cvta." # Str # ".u32 \t$result, $src;", []>;
-   def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
-          "cvta." # Str # ".u64 \t$result, $src;", []>;
+multiclass NG_TO_G<string Str, bit Supports32 = 1, list<Predicate> Preds = []> {
+  foreach bitwidth = !if(Supports32, ["32", "64"], ["64"]) in {
+    if !eq(bitwidth, "32") then {
+      def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
+               "cvta." # Str # ".u32 \t$result, $src;", []>, Requires<Preds>;
+    } else if !eq(bitwidth, "64") then {
+      def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
+                "cvta." # Str # ".u64 \t$result, $src;", []>, Requires<Preds>;
+    }
+  }
 }
 
-multiclass G_TO_NG<string Str> {
-   def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
-          "cvta.to." # Str # ".u32 \t$result, $src;", []>;
-   def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
-          "cvta.to." # Str # ".u64 \t$result, $src;", []>;
+multiclass G_TO_NG<string Str, bit Supports32 = 1, list<Predicate> Preds = []> {
+  foreach bitwidth = !if(Supports32, ["32", "64"], ["64"]) in {
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AlexMaclean wrote:

I don't think this foreach loop is really accomplishing much. Can it just be removed?

https://github.com/llvm/llvm-project/pull/135444