[clang] [clang][Sema][SYCL] Fix MSVC STL usage on AMDGPU (PR #135979)
Nick Sarnie via cfe-commits
cfe-commits at lists.llvm.org
Fri Apr 18 07:34:31 PDT 2025
https://github.com/sarnex updated https://github.com/llvm/llvm-project/pull/135979
>From ca1fa9218048cc6a54b8ec912b11e630887cacae Mon Sep 17 00:00:00 2001
From: "Sarnie, Nick" <nick.sarnie at intel.com>
Date: Wed, 16 Apr 2025 08:39:24 -0700
Subject: [PATCH 1/2] [clang][Sema][SYCL] Fix MSVC STL usage on AMDGPU
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
---
clang/lib/Sema/SemaDeclAttr.cpp | 7 ++++++-
clang/test/SemaSYCL/Inputs/vectorcall.hpp | 18 ++++++++++++++++++
clang/test/SemaSYCL/sycl-cconv-win.cpp | 5 +++++
3 files changed, 29 insertions(+), 1 deletion(-)
create mode 100644 clang/test/SemaSYCL/Inputs/vectorcall.hpp
create mode 100644 clang/test/SemaSYCL/sycl-cconv-win.cpp
diff --git a/clang/lib/Sema/SemaDeclAttr.cpp b/clang/lib/Sema/SemaDeclAttr.cpp
index bc891fb009410..3594111d86ccc 100644
--- a/clang/lib/Sema/SemaDeclAttr.cpp
+++ b/clang/lib/Sema/SemaDeclAttr.cpp
@@ -5492,12 +5492,12 @@ bool Sema::CheckCallingConvAttr(const ParsedAttr &Attrs, CallingConv &CC,
TargetInfo::CallingConvCheckResult A = TargetInfo::CCCR_OK;
const TargetInfo &TI = Context.getTargetInfo();
+ auto *Aux = Context.getAuxTargetInfo();
// CUDA functions may have host and/or device attributes which indicate
// their targeted execution environment, therefore the calling convention
// of functions in CUDA should be checked against the target deduced based
// on their host/device attributes.
if (LangOpts.CUDA) {
- auto *Aux = Context.getAuxTargetInfo();
assert(FD || CFT != CUDAFunctionTarget::InvalidTarget);
auto CudaTarget = FD ? CUDA().IdentifyTarget(FD) : CFT;
bool CheckHost = false, CheckDevice = false;
@@ -5522,6 +5522,11 @@ bool Sema::CheckCallingConvAttr(const ParsedAttr &Attrs, CallingConv &CC,
A = HostTI->checkCallingConvention(CC);
if (A == TargetInfo::CCCR_OK && CheckDevice && DeviceTI)
A = DeviceTI->checkCallingConvention(CC);
+ } else if (LangOpts.SYCLIsDevice && TI.getTriple().isAMDGPU() &&
+ CC == CC_X86VectorCall) {
+ A = TI.checkCallingConvention(CC);
+ if (Aux && A != TargetInfo::CCCR_OK)
+ A = Aux->checkCallingConvention(CC);
} else {
A = TI.checkCallingConvention(CC);
}
diff --git a/clang/test/SemaSYCL/Inputs/vectorcall.hpp b/clang/test/SemaSYCL/Inputs/vectorcall.hpp
new file mode 100644
index 0000000000000..566a48dd24c30
--- /dev/null
+++ b/clang/test/SemaSYCL/Inputs/vectorcall.hpp
@@ -0,0 +1,18 @@
+
+template <typename F> struct A{};
+
+template <typename Ret, typename C, typename... Args> struct A<Ret ( C::*)(Args...) noexcept> { static constexpr int value = 0; };
+template <typename Ret, typename C, typename... Args> struct A<Ret (__vectorcall C::*)(Args...) noexcept> { static constexpr int value = 1; };
+
+template <typename F> constexpr int A_v = A<F>::value;
+
+struct B
+{
+ void f() noexcept {}
+ void __vectorcall g() noexcept {}
+};
+
+int main()
+{
+ return A_v<decltype(&B::f)> + A_v<decltype(&B::g)>;
+}
diff --git a/clang/test/SemaSYCL/sycl-cconv-win.cpp b/clang/test/SemaSYCL/sycl-cconv-win.cpp
new file mode 100644
index 0000000000000..f0c22a2ed3921
--- /dev/null
+++ b/clang/test/SemaSYCL/sycl-cconv-win.cpp
@@ -0,0 +1,5 @@
+// RUN: %clang_cc1 -isystem %S/Inputs/ -fsycl-is-device -triple amdgcn-amd-hsa -aux-triple x86_64-pc-windows-msvc -fsyntax-only -verify %s
+
+// expected-no-diagnostics
+
+#include <vectorcall.hpp>
>From 8b757b1453b4e7d2e16c97865904b16fd3ea820c Mon Sep 17 00:00:00 2001
From: "Sarnie, Nick" <nick.sarnie at intel.com>
Date: Fri, 18 Apr 2025 07:34:18 -0700
Subject: [PATCH 2/2] add comment, address feedback
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
---
clang/lib/Sema/SemaDeclAttr.cpp | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/clang/lib/Sema/SemaDeclAttr.cpp b/clang/lib/Sema/SemaDeclAttr.cpp
index 3594111d86ccc..46bebb7e53d75 100644
--- a/clang/lib/Sema/SemaDeclAttr.cpp
+++ b/clang/lib/Sema/SemaDeclAttr.cpp
@@ -5524,6 +5524,10 @@ bool Sema::CheckCallingConvAttr(const ParsedAttr &Attrs, CallingConv &CC,
A = DeviceTI->checkCallingConvention(CC);
} else if (LangOpts.SYCLIsDevice && TI.getTriple().isAMDGPU() &&
CC == CC_X86VectorCall) {
+ // Assuming SYCL Device AMDGPU CC_X86VectorCall functions are always to be
+ // emitted on the host. The MSVC STL has CC-based specializations so we
+ // cannot change the CC to be the default as that will cause a clash with
+ // another specialization.
A = TI.checkCallingConvention(CC);
if (Aux && A != TargetInfo::CCCR_OK)
A = Aux->checkCallingConvention(CC);
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