[clang] [CIR] Upstream SelectOp and ShiftOp (PR #133405)
Andy Kaylor via cfe-commits
cfe-commits at lists.llvm.org
Mon Mar 31 13:01:06 PDT 2025
================
@@ -759,6 +762,46 @@ LogicalResult cir::BinOp::verify() {
return mlir::success();
}
+//===----------------------------------------------------------------------===//
+// ShiftOp
+//===----------------------------------------------------------------------===//
+LogicalResult cir::ShiftOp::verify() {
+ mlir::Operation *op = getOperation();
+ mlir::Type resType = getResult().getType();
+ assert(!cir::MissingFeatures::vectorType());
+ bool isOp0Vec = false;
+ bool isOp1Vec = false;
+ if (isOp0Vec != isOp1Vec)
+ return emitOpError() << "input types cannot be one vector and one scalar";
+ if (isOp1Vec && op->getOperand(1).getType() != resType) {
+ return emitOpError() << "shift amount must have the type of the result "
+ << "if it is vector shift";
+ }
+ return mlir::success();
+}
+
+//===----------------------------------------------------------------------===//
+// SelectOp
+//===----------------------------------------------------------------------===//
+
+OpFoldResult cir::SelectOp::fold(FoldAdaptor adaptor) {
+ mlir::Attribute condition = adaptor.getCondition();
+ if (condition) {
+ bool conditionValue = mlir::cast<cir::BoolAttr>(condition).getValue();
+ return conditionValue ? getTrueValue() : getFalseValue();
+ }
+
+ // cir.select if %0 then x else x -> x
+ mlir::Attribute trueValue = adaptor.getTrueValue();
+ mlir::Attribute falseValue = adaptor.getFalseValue();
+ if (trueValue && trueValue == falseValue)
----------------
andykaylor wrote:
Is `trueValue` optional? If not, these two checks seem redundant.
https://github.com/llvm/llvm-project/pull/133405
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