[clang] [llvm] [RISCV] Add Qualcomn uC Xqcili (load large immediates) extension (PR #130012)

[Sudharsan Veeravalli via cfe-commits]

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@@ -0,0 +1,27 @@
+# Xqcili - Qualcomm uC Load Large Immediate Extension
+# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-xqcili < %s 2>&1 \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-PLUS %s
+# RUN: not llvm-mc -triple riscv32 -mattr=-experimental-xqcili < %s 2>&1 \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-MINUS %s
+
+# CHECK-PLUS: :[[@LINE+2]]:9: error: register must be a GPR excluding zero (x0)
+# CHECK_MINUS: :[[@LINE+1]]:9: error: invalid operand for instruction
+qc.e.li 9, 33554432
+
+# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
+qc.e.li x9
+
+# CHECK-PLUS: :[[@LINE+2]]:13: error: immediate must be an integer in the range [-2147483648, 4294967295]
+# CHECK_MINUS: :[[@LINE+1]]:13: error: invalid operand for instruction
+qc.e.li x9, 4294967296
+
+# CHECK-PLUS: :[[@LINE+2]]:7: error: register must be a GPR excluding zero (x0)
+# CHECK_MINUS: :[[@LINE+1]]:7: error: invalid operand for instruction
+qc.li x0, 114514
+
+# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
+qc.li x10
+
+# CHECK-PLUS: :[[@LINE+2]]:12: error: immediate must be an integer in the range [-524288, 524287]
+# CHECK-MINUS: :[[@LINE+1]]:12: error: invalid operand for instruction
+qc.li x10, 33554432
----------------
svs-quic wrote:

Please add valid instructions that print an error  like 
"error: instruction requires the following: 'Xqcili'" with CHECK-MINUS:

You can look at patches that add support for the other extensions for reference.

https://github.com/llvm/llvm-project/pull/130012