[clang] Implement the `fmod` intrinsic (PR #130320)

Kaitlin Peng via cfe-commits cfe-commits at lists.llvm.org
Fri Mar 7 18:31:05 PST 2025


================
@@ -22,56 +22,136 @@
 //
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN:   -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half
+// RUN:   -emit-llvm -o - | FileCheck %s \
+// RUN:   -DTYPE=half --check-prefixes=CHECK,SPVCHECK
 
 //
 // ---------- No Native Half support test -----------
 //
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm \
 // RUN:   -o - | FileCheck %s \
-// RUN:   -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float
+// RUN:   -DTYPE=float --check-prefixes=CHECK,SPVCHECK
 
 
 
-// CHECK: define [[FNATTRS]] [[TYPE]] @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn [[TYPE]]
-// CHECK: ret [[TYPE]] %fmod
+// CHECK-LABEL: test_fmod_half
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] [[X:%.*]], [[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]] [[DIV1_I:%.*]]
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge [[TYPE]] [[DIV1_I_2:%.*]], %fneg.i
+// DXNATIVE_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]] @llvm.fabs.f16([[TYPE]] [[DIV1_I_3:%.*]])
+// DXNO_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]] @llvm.fabs.f32([[TYPE]] [[DIV1_I_3:%.*]])
+// DXNATIVE_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]] @llvm.dx.frac.f16([[TYPE]] %elt.abs.i)
+// DXNO_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]] @llvm.dx.frac.f32([[TYPE]] %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]] [[HLSL_FRAC_I:%.*]]
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn i1 [[CMP_I:%.*]], [[TYPE]] [[HLSL_FRAC_I_2:%.*]], [[TYPE]] %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn [[TYPE]] %hlsl.select.i, [[Y_2:%.*]]
+// DXCHECK: ret [[TYPE]] %mul.i
+// SPVCHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn [[TYPE]] [[X:%.*]], [[Y:%.*]]
+// SPVCHECK: ret [[TYPE]] %fmod.i
 half test_fmod_half(half p0, half p1) { return fmod(p0, p1); }
 
-// CHECK: define [[FNATTRS]] <2 x [[TYPE]]> @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
-// CHECK: ret <2 x [[TYPE]]> %fmod
+// CHECK-LABEL: test_fmod_half2
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]> [[X:%.*]], [[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]> [[DIV1_I:%.*]]
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge <2 x [[TYPE]]> [[DIV1_I_2:%.*]], %fneg.i
+// DXNATIVE_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]> @llvm.fabs.v2f16(<2 x [[TYPE]]> [[DIV1_I_3:%.*]])
+// DXNO_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]> @llvm.fabs.v2f32(<2 x [[TYPE]]> [[DIV1_I_3:%.*]])
+// DXNATIVE_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]> @llvm.dx.frac.v2f16(<2 x [[TYPE]]> %elt.abs.i)
+// DXNO_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]> @llvm.dx.frac.v2f32(<2 x [[TYPE]]> %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]> [[HLSL_FRAC_I:%.*]]
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn <2 x i1> [[CMP_I:%.*]], <2 x [[TYPE]]> [[HLSL_FRAC_I_2:%.*]], <2 x [[TYPE]]> %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]> %hlsl.select.i, [[Y_2:%.*]]
+// DXCHECK: ret <2 x [[TYPE]]> %mul.i
+// SPVCHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]> [[X:%.*]], [[Y:%.*]]
+// SPVCHECK: ret <2 x [[TYPE]]> %fmod.i
 half2 test_fmod_half2(half2 p0, half2 p1) { return fmod(p0, p1); }
 
-// CHECK: define [[FNATTRS]] <3 x [[TYPE]]> @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
-// CHECK: ret <3 x [[TYPE]]> %fmod
+// CHECK-LABEL: test_fmod_half3
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]> [[X:%.*]], [[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]> [[DIV1_I:%.*]]
----------------
kmpeng wrote:

Do you think I need to add DXCHECKs for the other operators that are like the `DIV1_I` ones? Adding it for `HLSL_FRAC_I` wouldn't be much of a problem, but `CMP_I` would require a lot of lines.

  ```llvm
%cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge <2 x half> %6, %fneg.i
  %sext.i = sext <2 x i1> %cmp.i to <2 x i16>
  %insertvec.i = shufflevector <2 x i1> %cmp.i, <2 x i1> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
  %8 = bitcast <8 x i1> %insertvec.i to i8
...
%load_bits.i = load i8, ptr %ge.i, align 1
  %10 = bitcast i8 %load_bits.i to <8 x i1>
  %extractvec.i = shufflevector <8 x i1> %10, <8 x i1> poison, <2 x i32> <i32 0, i32 1>
...
  %hlsl.select.i = select reassoc nnan ninf nsz arcp afn <2 x i1> %extractvec.i, <2 x half> %11, <2 x half> %fneg2.i
```

https://github.com/llvm/llvm-project/pull/130320


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