[clang] [NFC] Add additional checks to test for vec_pack_to_short_fp32 (PR #130324)

Lei Huang via cfe-commits cfe-commits at lists.llvm.org
Fri Mar 7 10:47:22 PST 2025


https://github.com/lei137 created https://github.com/llvm/llvm-project/pull/130324

Update tests in pref for IR changes that will be introduced in https://github.com/llvm/llvm-project/pull/129923

>From 51c05790f7cd38e6db324dcd55b7491118b1c3e2 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Fri, 7 Mar 2025 13:44:52 -0500
Subject: [PATCH] add additional checks to test for vec_pack_to_short_fp32

---
 clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
index b55a522ed2608..68d32ee14c8fa 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
@@ -853,10 +853,16 @@ vector unsigned char test73(void) {
 vector unsigned short test74(void) {
 // CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
 // CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
-// CHECK-BE: @llvm.ppc.altivec.vperm
+// CHECK-BE: [[REG0:%[0-9]+]] = call <4 x i32> @llvm.ppc.altivec.vperm
+// CHECK-BE-NEXT: [[REG1:%[0-9]+]] = bitcast <4 x i32> [[REG0]] to <4 x float>
+// CHECK-BE-NEXT: [[REG2:%[0-9]+]] = bitcast <4 x float> [[REG1]] to <8 x i16>
+// CHECK-BE-NEXT: ret <8 x i16> [[REG2]]
 // CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
 // CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
-// CHECK: @llvm.ppc.altivec.vperm
+// CHECK: [[REG0:%[0-9]+]] = call <4 x i32> @llvm.ppc.altivec.vperm
+// CHECK-NEXT: [[REG1:%[0-9]+]] = bitcast <4 x i32> [[REG0]] to <4 x float>
+// CHECK-NEXT: [[REG2:%[0-9]+]] = bitcast <4 x float> [[REG1]] to <8 x i16>
+// CHECK-NEXT: ret <8 x i16> [[REG2]]
   return vec_pack_to_short_fp32(vfa, vfb);
 }
 vector unsigned int test75(void) {



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