[clang] [compiler-rt] [llvm] [SystemZ] Add support for half (fp16) (PR #109164)

[Jonas Paulsson via cfe-commits]

JonPsson1 wrote:

>  Does s390x have +soft-float or any features that toggle the availability of float conversion ops?

Yes, we support soft-float, and as I wrote earlier I am worried what happens with soft-float and conversion functions. I saw that with soft-float, the same conversion functions are called, but with args in integer registers, while with hard-float they go in fp-registers. For that to work, there would have to be another library with the same functions but with the soft-float abi. I am not sure if compiler-rt could be built for soft-float, but perhaps the gcc lib has them, in which case it seem reasonable to allow that ABI change in the tests. The user just has to provide a soft-float library for the conversion functions as well.

I guess we should provide all six conversion functions (for hard float) then, per your comments. 

https://github.com/llvm/llvm-project/pull/109164