[clang] [llvm] [AArch64][SVE] Improve fixed-length addressing modes. (PR #129732)

[Ricardo Jesus via cfe-commits]

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@@ -7380,12 +7380,27 @@ bool AArch64DAGToDAGISel::SelectAddrModeIndexedSVE(SDNode *Root, SDValue N,
     return false;
 
   SDValue VScale = N.getOperand(1);
-  if (VScale.getOpcode() != ISD::VSCALE)
+  int64_t MulImm = std::numeric_limits<int64_t>::max();
+  if (VScale.getOpcode() == ISD::VSCALE)
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rj-jesus wrote:

Thanks, done.

https://github.com/llvm/llvm-project/pull/129732