[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

[Hank Chang via cfe-commits]

HankChang736 wrote:

I tested the following case without passing the 'v' extension in the Clang command line argument:
```c
__attribute__((target("arch=rv32gcv_zve32x")))
void test_A(int *p) {
  asm volatile("" :: "A"(*p));
}
```
The generated LLVM IR result is:
```
; Function Attrs: nounwind
define dso_local void @test_A(ptr noundef %p) local_unnamed_addr #0 {
entry:
  tail call void asm sideeffect "", "*A"(ptr elementtype(i32) %p) #1, !srcloc !6
  ret void
}

attributes #0 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic-rv32" "target-features"="+32bit,+a,+c,+d,+f,+m,+relax,+v,+zaamo,+zalrsc,+zicsr,+zifencei,+zmmul,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b ... 

```
>From this result, it appears that the target attribute does not have the intended effect in this case. Given this, perhaps we should keep the initial implementation temporary and try the RISCVInsertVSETVLI approach for future improvements.

cc @wangpc-pp @topperc 

https://github.com/llvm/llvm-project/pull/128636