[clang] [llvm] [AArch64][SVE] Improve fixed-length addressing modes. (PR #129732)
Madhur Amilkanthwar via cfe-commits
cfe-commits at lists.llvm.org
Tue Mar 4 20:38:06 PST 2025
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@@ -7380,12 +7380,27 @@ bool AArch64DAGToDAGISel::SelectAddrModeIndexedSVE(SDNode *Root, SDValue N,
return false;
SDValue VScale = N.getOperand(1);
- if (VScale.getOpcode() != ISD::VSCALE)
+ int64_t MulImm = std::numeric_limits<int64_t>::max();
+ if (VScale.getOpcode() == ISD::VSCALE)
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madhur13490 wrote:
This should be enclosed in `{}` to keep it unified with the `else` block per coding standards [guidelines](https://llvm.org/docs/CodingStandards.html#don-t-use-braces-on-simple-single-statement-bodies-of-if-else-loop-statements).
https://github.com/llvm/llvm-project/pull/129732
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