[clang] [llvm] [RISCV][MC] Add assembler support for XRivosVisni (PR #128773)

Philip Reames via cfe-commits cfe-commits at lists.llvm.org
Wed Feb 26 08:10:22 PST 2025


================
@@ -10,6 +10,46 @@
 //
 //===----------------------------------------------------------------------===//
 
+class RVInstVXI<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
+                string opcodestr, string argstr>
+    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
+  bits<5> imm;
+  bits<5> rs1;
+  bits<5> vd;
+  bit vm;
+
+  let Inst{31-26} = funct6;
+  let Inst{25} = vm;
+  let Inst{24-20} = imm;
+  let Inst{19-15} = rs1;
+  let Inst{14-12} = opv.Value;
+  let Inst{11-7} = vd;
+  let Inst{6-0} = OPC_OP_V.Value;
----------------
preames wrote:

I pushed a change to the review which did this specialization.  If you like that less, I can revert it back.

https://github.com/llvm/llvm-project/pull/128773


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