[clang] [llvm] [AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (PR #127837)
Paul Walker via cfe-commits
cfe-commits at lists.llvm.org
Wed Feb 26 03:52:32 PST 2025
================
@@ -2993,6 +2993,22 @@ let Predicates = [HasSVE_or_SME] in {
defm : unpred_loadstore_bitcast<nxv2i64>;
defm : unpred_loadstore_bitcast<nxv2f64>;
+ // Allow using LDR/STR to avoid the predicate dependence.
+ let Predicates = [IsLE, AllowMisalignedMemAccesses] in
+ foreach Ty = [ nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv8f16, nxv4f32, nxv2f64, nxv8bf16 ] in {
+ let AddedComplexity = 2 in {
+ def : Pat<(Ty (load (am_sve_indexed_s9 GPR64sp:$base, simm9:$offset))),
+ (LDR_ZXI GPR64sp:$base, simm9:$offset)>;
+ def : Pat<(store Ty:$val, (am_sve_indexed_s9 GPR64sp:$base, simm9:$offset)),
+ (STR_ZXI ZPR:$val, GPR64sp:$base, simm9:$offset)>;
+ }
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paulwalker-arm wrote:
I just wrote something similar and agree it certainly looks wrong. Nesting classes and setting `Predicate` never really works the way you'd expect. You often need to know the parent value and duplicate it.
My guess here is that because the Predicate is set with a multi-class it is being overridden by the Predicate value at the point the multi-class is instantiated. Your PR avoids this but then is most likely overriding in the other direction and stripping `HasSVE`. The only reason that does not cause any issues is because we will not get this far without the `+sve` support anyway.
https://github.com/llvm/llvm-project/pull/127837
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