[clang] [llvm] [AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (PR #127837)

[Ricardo Jesus via cfe-commits]

================
@@ -2993,6 +2993,22 @@ let Predicates = [HasSVE_or_SME] in {
   defm : unpred_loadstore_bitcast<nxv2i64>;
   defm : unpred_loadstore_bitcast<nxv2f64>;
 
+  // Allow using LDR/STR to avoid the predicate dependence.
+  let Predicates = [IsLE, AllowMisalignedMemAccesses] in
+    foreach Ty = [ nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv8f16, nxv4f32, nxv2f64, nxv8bf16 ] in {
+      let AddedComplexity = 2 in {
+        def : Pat<(Ty (load (am_sve_indexed_s9 GPR64sp:$base, simm9:$offset))),
+                  (LDR_ZXI GPR64sp:$base, simm9:$offset)>;
+        def : Pat<(store Ty:$val, (am_sve_indexed_s9 GPR64sp:$base, simm9:$offset)),
+                  (STR_ZXI ZPR:$val, GPR64sp:$base, simm9:$offset)>;
+      }
----------------
rj-jesus wrote:

Thanks, that's where I had them initially, but it seems the predicates weren't being applied when the patterns were in `unpred_loadstore_bitcast`. For example, I was already using the `IsLE` predicate when I opened this PR, but it only became effective when I moved the patterns out into the separate loop as you can [see in the latest commit](https://github.com/llvm/llvm-project/pull/127837/commits/6b1ad6758cd854bc8d15e07b4dae4f2936c416bb#diff-e59a1dfcf45e1736fe516d49e304f65e921ac474ef443b78b2e6ca27abbded68). Although, now that I'm looking at it, the original patterns in `unpred_loadstore_bitcast` also [don't seem to be correct](https://godbolt.org/z/1bvndses7)? Am I missing anything?

https://github.com/llvm/llvm-project/pull/127837