[clang] 43999de - [spirv][amdgpu] Set atomic size in the clang target info (#128569)

via cfe-commits cfe-commits at lists.llvm.org
Tue Feb 25 10:31:15 PST 2025


Author: Jon Chesterfield
Date: 2025-02-25T18:31:10Z
New Revision: 43999deb370113945ef86680014f838f55315ee7

URL: https://github.com/llvm/llvm-project/commit/43999deb370113945ef86680014f838f55315ee7
DIFF: https://github.com/llvm/llvm-project/commit/43999deb370113945ef86680014f838f55315ee7.diff

LOG: [spirv][amdgpu] Set atomic size in the clang target info (#128569)

Problem identified by Joseph. The openmp device runtime uses
__scoped_atomic_load_n and similar which presently hit

```
error: large atomic operation may incur significant performance
      penalty; the access size (4 bytes) exceeds the max lock-free size (0 bytes) [-Werror,-Watomic-alignment]
```

This is because the spirv class doesn't set the corresponding field. The
base does, but only if there's a host toolchain, which there isn't.

Added: 
    

Modified: 
    clang/lib/Basic/Targets/SPIR.h

Removed: 
    


################################################################################
diff  --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index 61f9ef7e3e361..610efa1fe00d9 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -399,6 +399,8 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64AMDGCNTargetInfo final
     HasLegalHalfType = true;
     HasFloat16 = true;
     HalfArgsAndReturns = true;
+
+    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
   }
 
   bool hasBFloat16Type() const override { return true; }


        


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