[clang] [spirv][amdgpu] Set atomic size in the clang target info (PR #128569)

[via cfe-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-clang

Author: Jon Chesterfield (JonChesterfield)

<details>
<summary>Changes</summary>

Problem identified by Joseph. The openmp device runtime uses __scoped_atomic_load_n and similar which presently hit 

```
error: large atomic operation may incur significant performance
      penalty; the access size (4 bytes) exceeds the max lock-free size (0 bytes) [-Werror,-Watomic-alignment]
```

This is because the spirv class doesn't set the corresponding field. The base does, but only if there's a host toolchain, which there isn't.

---
Full diff: https://github.com/llvm/llvm-project/pull/128569.diff


1 Files Affected:

- (modified) clang/lib/Basic/Targets/SPIR.h (+2) 


``````````diff
diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index 61f9ef7e3e361..610efa1fe00d9 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -399,6 +399,8 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64AMDGCNTargetInfo final
     HasLegalHalfType = true;
     HasFloat16 = true;
     HalfArgsAndReturns = true;
+
+    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
   }
 
   bool hasBFloat16Type() const override { return true; }

``````````

</details>


https://github.com/llvm/llvm-project/pull/128569