[clang] [clang][x86] Support -masm=intel in cpuid.h (PR #127331)
via cfe-commits
cfe-commits at lists.llvm.org
Sat Feb 15 16:45:32 PST 2025
https://github.com/Alcaro updated https://github.com/llvm/llvm-project/pull/127331
>From 90e3f502e582f44cd19e1b8b71d218330b13c9e4 Mon Sep 17 00:00:00 2001
From: Alcaro <floating at muncher.se>
Date: Sat, 15 Feb 2025 16:05:40 +0100
Subject: [PATCH 1/4] [clang][x86] Support -masm=intel in cpuid.h
---
clang/lib/Headers/cpuid.h | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/clang/lib/Headers/cpuid.h b/clang/lib/Headers/cpuid.h
index 2601aa5724f05..d8ace39d4e7d1 100644
--- a/clang/lib/Headers/cpuid.h
+++ b/clang/lib/Headers/cpuid.h
@@ -268,16 +268,16 @@
#else
/* x86-64 uses %rbx as the base register, so preserve it. */
#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
- __asm(" xchgq %%rbx,%q1\n" \
+ __asm(" xchg{q|} {%%|}rbx,%q1\n" \
" cpuid\n" \
- " xchgq %%rbx,%q1" \
+ " xchg{q|} {%%|}rbx,%q1" \
: "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
: "0"(__leaf))
#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
- __asm(" xchgq %%rbx,%q1\n" \
+ __asm(" xchg{q|} {%%|}rbx,%q1\n" \
" cpuid\n" \
- " xchgq %%rbx,%q1" \
+ " xchg{q|} {%%|}rbx,%q1" \
: "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
: "0"(__leaf), "2"(__count))
#endif
@@ -289,18 +289,18 @@ static __inline unsigned int __get_cpuid_max (unsigned int __leaf,
#ifdef __i386__
int __cpuid_supported;
- __asm(" pushfl\n"
- " popl %%eax\n"
- " movl %%eax,%%ecx\n"
- " xorl $0x00200000,%%eax\n"
- " pushl %%eax\n"
- " popfl\n"
- " pushfl\n"
- " popl %%eax\n"
- " movl $0,%0\n"
- " cmpl %%eax,%%ecx\n"
+ __asm(" pushf{l|d}\n"
+ " pop{l|} {%%|}eax\n"
+ " mov{l|} {%%eax,%%ecx|ecx,eax}\n"
+ " xor{l|} {$0x00200000,%%eax|eax,0x00200000}\n"
+ " push{l|} {%%|}eax\n"
+ " popf{l|d}\n"
+ " pushf{l|d}\n"
+ " pop{l|} {%%|}eax\n"
+ " mov{l|} {$0,%0|%0,0}\n"
+ " cmp{l|} {%%eax,%%ecx|ecx,eax}\n"
" je 1f\n"
- " movl $1,%0\n"
+ " mov{l|} {$1,%0|%0,1}\n"
"1:"
: "=r" (__cpuid_supported) : : "eax", "ecx");
if (!__cpuid_supported)
>From ca0728b407af361559f954d9f25498c4af905dec Mon Sep 17 00:00:00 2001
From: Alcaro <floating at muncher.se>
Date: Sat, 15 Feb 2025 16:41:57 +0100
Subject: [PATCH 2/4] fix indentation
---
clang/lib/Headers/cpuid.h | 23 +++++++++++++----------
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/clang/lib/Headers/cpuid.h b/clang/lib/Headers/cpuid.h
index d8ace39d4e7d1..cd7d06ab29009 100644
--- a/clang/lib/Headers/cpuid.h
+++ b/clang/lib/Headers/cpuid.h
@@ -268,17 +268,18 @@
#else
/* x86-64 uses %rbx as the base register, so preserve it. */
#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
- __asm(" xchg{q|} {%%|}rbx,%q1\n" \
- " cpuid\n" \
- " xchg{q|} {%%|}rbx,%q1" \
- : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
+#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
+ __asm(" xchg{q|} {%%|}rbx,%q1\n" \
+ " cpuid\n" \
+ " xchg{q|} {%%|}rbx,%q1" \
+ : "=a"(__eax), "=r"(__ebx), "=c"(__ecx), "=d"(__edx) \
: "0"(__leaf))
-#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
- __asm(" xchg{q|} {%%|}rbx,%q1\n" \
- " cpuid\n" \
- " xchg{q|} {%%|}rbx,%q1" \
- : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
+#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
+ __asm(" xchg{q|} {%%|}rbx,%q1\n" \
+ " cpuid\n" \
+ " xchg{q|} {%%|}rbx,%q1" \
+ : "=a"(__eax), "=r"(__ebx), "=c"(__ecx), "=d"(__edx) \
: "0"(__leaf), "2"(__count))
#endif
@@ -302,7 +303,9 @@ static __inline unsigned int __get_cpuid_max (unsigned int __leaf,
" je 1f\n"
" mov{l|} {$1,%0|%0,1}\n"
"1:"
- : "=r" (__cpuid_supported) : : "eax", "ecx");
+ : "=r"(__cpuid_supported)
+ :
+ : "eax", "ecx");
if (!__cpuid_supported)
return 0;
#endif
>From 60cb44507360cfbb13d36dacde24807e1bb22254 Mon Sep 17 00:00:00 2001
From: Alcaro <floating at muncher.se>
Date: Sat, 15 Feb 2025 16:48:22 +0100
Subject: [PATCH 3/4] fix copypaste fail
---
clang/lib/Headers/cpuid.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/clang/lib/Headers/cpuid.h b/clang/lib/Headers/cpuid.h
index cd7d06ab29009..52addb7bfa856 100644
--- a/clang/lib/Headers/cpuid.h
+++ b/clang/lib/Headers/cpuid.h
@@ -267,7 +267,6 @@
: "0"(__leaf), "2"(__count))
#else
/* x86-64 uses %rbx as the base register, so preserve it. */
-#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
__asm(" xchg{q|} {%%|}rbx,%q1\n" \
" cpuid\n" \
>From 36e551e0993a94e1709a1d2c834817fb44b6b24e Mon Sep 17 00:00:00 2001
From: Alcaro <floating at muncher.se>
Date: Sun, 16 Feb 2025 01:45:23 +0100
Subject: [PATCH 4/4] update expected results
---
clang/test/Headers/cpuid.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/clang/test/Headers/cpuid.c b/clang/test/Headers/cpuid.c
index 6ed12eca7a61d..1c4f29dc52938 100644
--- a/clang/test/Headers/cpuid.c
+++ b/clang/test/Headers/cpuid.c
@@ -4,9 +4,9 @@
#include <cpuid.h>
#include <cpuid.h> // Make sure multiple inclusion protection works.
-// CHECK-64: {{.*}} call { i32, i32, i32, i32 } asm " xchgq %rbx,${1:q}\0A cpuid\0A xchgq %rbx,${1:q}", "={ax},=r,={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}})
-// CHECK-64: {{.*}} call { i32, i32, i32, i32 } asm " xchgq %rbx,${1:q}\0A cpuid\0A xchgq %rbx,${1:q}", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}}, i32 %{{[a-z0-9]+}})
-// CHECK-64: {{.*}} call { i32, i32, i32, i32 } asm " xchgq %rbx,${1:q}\0A cpuid\0A xchgq %rbx,${1:q}", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}}, i32 %{{[a-z0-9]+}})
+// CHECK-64: {{.*}} call { i32, i32, i32, i32 } asm " xchg$(q$|$) $(%$|$)rbx,${1:q}\0A cpuid\0A xchg$(q$|$) $(%$|$)rbx,${1:q}", "={ax},=r,={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}})
+// CHECK-64: {{.*}} call { i32, i32, i32, i32 } asm " xchg$(q$|$) $(%$|$)rbx,${1:q}\0A cpuid\0A xchg$(q$|$) $(%$|$)rbx,${1:q}", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}}, i32 %{{[a-z0-9]+}})
+// CHECK-64: {{.*}} call { i32, i32, i32, i32 } asm " xchg$(q$|$) $(%$|$)rbx,${1:q}\0A cpuid\0A xchg$(q$|$) $(%$|$)rbx,${1:q}", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}}, i32 %{{[a-z0-9]+}})
// CHECK-32: {{.*}} call { i32, i32, i32, i32 } asm "cpuid", "={ax},={bx},={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}})
// CHECK-32: {{.*}} call { i32, i32, i32, i32 } asm "cpuid", "={ax},={bx},={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}}, i32 %{{[a-z0-9]+}})
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