[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

[Chris B via cfe-commits]

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@@ -10655,6 +10655,8 @@ def err_second_argument_to_cwsc_not_pointer : Error<
 
 def err_vector_incorrect_num_elements : Error<
   "%select{too many|too few}0 elements in vector %select{initialization|operand}3 (expected %1 elements, have %2)">;
+def err_invalid_even_odd_vector_element_count : Error<
+  "invalid element count of %0 in vector %select{initialization|operand}4 (expected an %select{even|odd}3 element count in the range of %1 and %2)">;
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llvm-beanz wrote:

This diagnostic seems odd. You only use it for requiring an even element count, but I'm not actually sure that's the most useful diagnostic for this case.

Really we need a vector whose total size is a multiple of 64-bits.

https://github.com/llvm/llvm-project/pull/127137