[clang] 6b486f4 - [Clang][Arch] Disable mve.fp when explicit -mfpu option (#123028)

via cfe-commits cfe-commits at lists.llvm.org
Wed Jan 22 07:49:23 PST 2025


Author: flopop01
Date: 2025-01-22T15:49:19Z
New Revision: 6b486f458fe40919577d9249fa754daa913795d1

URL: https://github.com/llvm/llvm-project/commit/6b486f458fe40919577d9249fa754daa913795d1
DIFF: https://github.com/llvm/llvm-project/commit/6b486f458fe40919577d9249fa754daa913795d1.diff

LOG: [Clang][Arch] Disable mve.fp when explicit -mfpu option (#123028)

Added: 
    

Modified: 
    clang/lib/Driver/ToolChains/Arch/ARM.cpp
    clang/test/Preprocessor/arm-target-features.c

Removed: 
    


################################################################################
diff  --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index c648fb66085c7f..f9d8aacaad234d 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -756,6 +756,15 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver &D,
       Features.push_back("-crc");
   }
 
+  // Invalid value of the __ARM_FEATURE_MVE macro when an explicit -mfpu= option
+  // disables MVE-FP -mfpu=fpv5-d16 or -mfpu=fpv5-sp-d16 disables the scalar
+  // half-precision floating-point operations feature. Therefore, because the
+  // M-profile Vector Extension (MVE) floating-point feature requires the scalar
+  // half-precision floating-point operations, this option also disables the MVE
+  // floating-point feature: -mve.fp
+  if (FPUKind == llvm::ARM::FK_FPV5_D16 || FPUKind == llvm::ARM::FK_FPV5_SP_D16)
+    Features.push_back("-mve.fp");
+
   // For Arch >= ARMv8.0 && A or R profile:  crypto = sha2 + aes
   // Rather than replace within the feature vector, determine whether each
   // algorithm is enabled and append this to the end of the vector.

diff  --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c
index 95ca7d0cbc3c2a..ecf9d7eb5c19c9 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -1005,3 +1005,11 @@
 // CHECK-V83-OR-LATER: __ARM_FEATURE_COMPLEX 1
 // CHECK-V81-OR-LATER: __ARM_FEATURE_QRDMX 1
 // CHECK-BEFORE-V83-NOT: __ARM_FEATURE_COMPLEX 1
+
+// Check if MVE floating-point feature is disabled (-mve.fp) during explicit fpv5-d16 or fpv5-sp-d16
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -mfpu=fpv5-d16 -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-MVE1 %s
+// CHECK-MVE1: #define __ARM_FEATURE_MVE 1
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -mfpu=fpv5-sp-d16 -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-MVE1_2 %s
+// CHECK-MVE1_2: #define __ARM_FEATURE_MVE 1
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-MVE3 %s
+// CHECK-MVE3: #define __ARM_FEATURE_MVE 3


        


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