[clang] [llvm] [RISCV] Add MIPS extensions (PR #121394)

Sam Elliott via cfe-commits cfe-commits at lists.llvm.org
Thu Jan 16 06:07:46 PST 2025


================
@@ -1448,3 +1448,18 @@ def FeatureTaggedGlobals : SubtargetFeature<"tagged-globals",
     "AllowTaggedGlobals",
     "true", "Use an instruction sequence for taking the address of a global "
     "that allows a memory tag in the upper address bits">;
+
+def FeatureVendorMIPSCMove : SubtargetFeature<"xmipscmove", "HasVendorMIPSCMove",
+                                       "true", "Using CCMov",
+                                       [Feature64Bit]>;
----------------
lenary wrote:

It would be better if this and `def FeatureVendorMIPSLoadStorePairs` both used `RISCVExtension`. I think this means some changes to the functions on riscvsubtarget too, it should be clear to follow from the other vendor extensions. This will also have a knock-on effect on some other tests, especially relating to RISCVISAInfo (and also some in clang iirc), but this is for the better - it means the compiler can show it supports your extensions 😄 

Please may you also put these definitions beside the other vendor extensions, rather than at the end with these codegen options? The section starts somewhere around line 1020, and you'll see each vendor's extensions are with each other.

https://github.com/llvm/llvm-project/pull/121394


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