[clang] [llvm] [RISC-V] Add support for MIPS P8700 CPU (PR #117865)

[Djordje Todorovic via cfe-commits]

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@@ -426,6 +426,12 @@ The current vendor extensions supported are:
 ``Xwchc``
   LLVM implements `the custom compressed opcodes present in some QingKe cores` by WCH / Nanjing Qinheng Microelectronics. The vendor refers to these opcodes by the name "XW".
 
+``xmipscmove``
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djtodoro wrote:

Thanks, addressed in https://github.com/llvm/llvm-project/pull/121394

https://github.com/llvm/llvm-project/pull/117865