[clang] [NFC][clang] Add ubsan-handler-merge.c test to show absence of nomerge (PR #119280)
Thurston Dang via cfe-commits
cfe-commits at lists.llvm.org
Mon Dec 9 14:44:08 PST 2024
https://github.com/thurstond created https://github.com/llvm/llvm-project/pull/119280
This shows that ubsan handlers do not have nomerge attributes, even if -ubsan-unique-trap is enabled.
0d15d46362bd6ab5a9a2165805adaab13a7689f4 attaches nomerge but only for trap mode.
ubsan-handler-merge.c is equivalent to ubsan-trap-merge.c (1b68b33ac0b3c2c8bd2ab89fec4f516f622cebdf) but without using trap mode.
>From 1b3a64701a8f496343360d8b6b86670f039a8e6d Mon Sep 17 00:00:00 2001
From: Thurston Dang <thurston at google.com>
Date: Mon, 9 Dec 2024 22:38:30 +0000
Subject: [PATCH] [NFC][clang] Add ubsan-handler-merge.c test to show absence
of nomerge
This shows that ubsan handlers do not have nomerge attributes, even if
-ubsan-unique-trap is enabled.
0d15d46362bd6ab5a9a2165805adaab13a7689f4 attaches nomerge but only for trap mode.
ubsan-handler-merge.c is equivalent to ubsan-trap-merge.c (1b68b33ac0b3c2c8bd2ab89fec4f516f622cebdf) but without using trap mode.
---
clang/test/CodeGen/ubsan-handler-merge.c | 113 +++++++++++++++++++++++
1 file changed, 113 insertions(+)
create mode 100644 clang/test/CodeGen/ubsan-handler-merge.c
diff --git a/clang/test/CodeGen/ubsan-handler-merge.c b/clang/test/CodeGen/ubsan-handler-merge.c
new file mode 100644
index 00000000000000..a6914f94f73e61
--- /dev/null
+++ b/clang/test/CodeGen/ubsan-handler-merge.c
@@ -0,0 +1,113 @@
+// NOTE: Assertions have mostly been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
+// The most important assertion is the attributes at the end of the file, which
+// shows that -ubsan-unique-traps does not attach 'nomerge' to each ubsan handler.
+//
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -fsanitize=signed-integer-overflow -O3 -mllvm -ubsan-unique-traps %s -o - \
+// RUN: | FileCheck %s
+//
+// REQUIRES: x86-registered-target
+
+// CHECK-LABEL: define dso_local range(i32 -2147483523, -2147483648) i32 @f(
+// CHECK-SAME: i32 noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[X]], i32 125), !nosanitize [[META2:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1, !nosanitize [[META2]]
+// CHECK-NEXT: br i1 [[TMP1]], label %[[HANDLER_ADD_OVERFLOW:.*]], label %[[CONT:.*]], !prof [[PROF3:![0-9]+]], !nosanitize [[META2]]
+// CHECK: [[HANDLER_ADD_OVERFLOW]]:
+// CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[X]] to i64, !nosanitize [[META2]]
+// CHECK-NEXT: tail call void @__ubsan_handle_add_overflow_abort(ptr nonnull @[[GLOB1:[0-9]+]], i64 [[TMP2]], i64 125) #[[ATTR4:[0-9]+]], !nosanitize [[META2]]
+// CHECK-NEXT: unreachable, !nosanitize [[META2]]
+// CHECK: [[CONT]]:
+// CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0, !nosanitize [[META2]]
+// CHECK-NEXT: ret i32 [[TMP3]]
+//
+int f(int x) {
+ return x + 125;
+}
+
+// CHECK-LABEL: define dso_local range(i32 -2147483521, -2147483648) i32 @g(
+// CHECK-SAME: i32 noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[X]], i32 127), !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1, !nosanitize [[META2]]
+// CHECK-NEXT: br i1 [[TMP1]], label %[[HANDLER_ADD_OVERFLOW:.*]], label %[[CONT:.*]], !prof [[PROF3]], !nosanitize [[META2]]
+// CHECK: [[HANDLER_ADD_OVERFLOW]]:
+// CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[X]] to i64, !nosanitize [[META2]]
+// CHECK-NEXT: tail call void @__ubsan_handle_add_overflow_abort(ptr nonnull @[[GLOB2:[0-9]+]], i64 [[TMP2]], i64 127) #[[ATTR4]], !nosanitize [[META2]]
+// CHECK-NEXT: unreachable, !nosanitize [[META2]]
+// CHECK: [[CONT]]:
+// CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0, !nosanitize [[META2]]
+// CHECK-NEXT: ret i32 [[TMP3]]
+//
+int g(int x) {
+ return x + 127;
+}
+
+// CHECK-LABEL: define dso_local range(i32 -2147483521, -2147483648) i32 @h(
+// CHECK-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[X]], i32 127), !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1, !nosanitize [[META2]]
+// CHECK-NEXT: br i1 [[TMP1]], label %[[HANDLER_ADD_OVERFLOW:.*]], label %[[CONT:.*]], !prof [[PROF3]], !nosanitize [[META2]]
+// CHECK: [[HANDLER_ADD_OVERFLOW]]:
+// CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[X]] to i64, !nosanitize [[META2]]
+// CHECK-NEXT: tail call void @__ubsan_handle_add_overflow_abort(ptr nonnull @[[GLOB3:[0-9]+]], i64 [[TMP2]], i64 127) #[[ATTR4]], !nosanitize [[META2]]
+// CHECK-NEXT: unreachable, !nosanitize [[META2]]
+// CHECK: [[CONT]]:
+// CHECK-NEXT: [[TMP3:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[Y]], i32 129), !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP3]], 1, !nosanitize [[META2]]
+// CHECK-NEXT: br i1 [[TMP4]], label %[[HANDLER_ADD_OVERFLOW1:.*]], label %[[CONT2:.*]], !prof [[PROF3]], !nosanitize [[META2]]
+// CHECK: [[HANDLER_ADD_OVERFLOW1]]:
+// CHECK-NEXT: [[TMP5:%.*]] = zext nneg i32 [[Y]] to i64, !nosanitize [[META2]]
+// CHECK-NEXT: tail call void @__ubsan_handle_add_overflow_abort(ptr nonnull @[[GLOB4:[0-9]+]], i64 [[TMP5]], i64 129) #[[ATTR4]], !nosanitize [[META2]]
+// CHECK-NEXT: unreachable, !nosanitize [[META2]]
+// CHECK: [[CONT2]]:
+// CHECK-NEXT: [[TMP6:%.*]] = extractvalue { i32, i1 } [[TMP3]], 0, !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0, !nosanitize [[META2]]
+// CHECK-NEXT: [[COND:%.*]] = tail call i32 @llvm.smin.i32(i32 [[TMP7]], i32 [[TMP6]])
+// CHECK-NEXT: ret i32 [[COND]]
+//
+int h(int x, int y) {
+ x += 127;
+ y += 129;
+ return x < y ? x : y;
+}
+
+// CHECK-LABEL: define dso_local noundef i32 @m(
+// CHECK-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[X]], i32 125), !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1, !nosanitize [[META2]]
+// CHECK-NEXT: br i1 [[TMP1]], label %[[HANDLER_ADD_OVERFLOW_I:.*]], label %[[F_EXIT:.*]], !prof [[PROF3]], !nosanitize [[META2]]
+// CHECK: [[HANDLER_ADD_OVERFLOW_I]]:
+// CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[X]] to i64, !nosanitize [[META2]]
+// CHECK-NEXT: tail call void @__ubsan_handle_add_overflow_abort(ptr nonnull @[[GLOB1]], i64 [[TMP2]], i64 125) #[[ATTR4]], !nosanitize [[META2]]
+// CHECK-NEXT: unreachable, !nosanitize [[META2]]
+// CHECK: [[F_EXIT]]:
+// CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0, !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP4:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[Y]], i32 127), !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP5:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1, !nosanitize [[META2]]
+// CHECK-NEXT: br i1 [[TMP5]], label %[[HANDLER_ADD_OVERFLOW_I2:.*]], label %[[G_EXIT:.*]], !prof [[PROF3]], !nosanitize [[META2]]
+// CHECK: [[HANDLER_ADD_OVERFLOW_I2]]:
+// CHECK-NEXT: [[TMP6:%.*]] = zext nneg i32 [[Y]] to i64, !nosanitize [[META2]]
+// CHECK-NEXT: tail call void @__ubsan_handle_add_overflow_abort(ptr nonnull @[[GLOB2]], i64 [[TMP6]], i64 127) #[[ATTR4]], !nosanitize [[META2]]
+// CHECK-NEXT: unreachable, !nosanitize [[META2]]
+// CHECK: [[G_EXIT]]:
+// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0, !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP8:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[TMP3]], i32 [[TMP7]]), !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP9:%.*]] = extractvalue { i32, i1 } [[TMP8]], 1, !nosanitize [[META2]]
+// CHECK-NEXT: br i1 [[TMP9]], label %[[HANDLER_ADD_OVERFLOW:.*]], label %[[CONT:.*]], !prof [[PROF3]], !nosanitize [[META2]]
+// CHECK: [[HANDLER_ADD_OVERFLOW]]:
+// CHECK-NEXT: [[TMP10:%.*]] = zext i32 [[TMP3]] to i64, !nosanitize [[META2]]
+// CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[TMP7]] to i64, !nosanitize [[META2]]
+// CHECK-NEXT: tail call void @__ubsan_handle_add_overflow_abort(ptr nonnull @[[GLOB5:[0-9]+]], i64 [[TMP10]], i64 [[TMP11]]) #[[ATTR4]], !nosanitize [[META2]]
+// CHECK-NEXT: unreachable, !nosanitize [[META2]]
+// CHECK: [[CONT]]:
+// CHECK-NEXT: [[TMP12:%.*]] = extractvalue { i32, i1 } [[TMP8]], 0, !nosanitize [[META2]]
+// CHECK-NEXT: ret i32 [[TMP12]]
+//
+int m(int x, int y) {
+ return f(x) + g(y);
+}
+//.
+// CHECK: attributes #[[ATTR4]] = { noreturn nounwind }
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