[clang] [llvm] Add processor aliases back to -print-supported-cpus and -mcpu=help (PR #118581)
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Tue Dec 3 18:41:47 PST 2024
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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
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git-clang-format --diff fdb050a5024320ec29d2edf3f2bc686c3a84abaa 46775c380244e47ddd9a3188651f37c3a3b33d23 --extensions h,cpp,c -- clang/test/Driver/print-supported-cpus.c llvm/include/llvm/CodeGen/TargetSubtargetInfo.h llvm/include/llvm/MC/MCSubtargetInfo.h llvm/lib/CodeGen/TargetSubtargetInfo.cpp llvm/lib/MC/MCSubtargetInfo.cpp llvm/utils/TableGen/SubtargetEmitter.cpp
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View the diff from clang-format here.
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diff --git a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
index f6d091408e..e6ff85725c 100644
--- a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
@@ -63,8 +63,7 @@ class Triple;
class TargetSubtargetInfo : public MCSubtargetInfo {
protected: // Can only create subclasses...
TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
- StringRef FS,
- ArrayRef<StringRef> PN,
+ StringRef FS, ArrayRef<StringRef> PN,
ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR,
diff --git a/llvm/include/llvm/MC/MCSubtargetInfo.h b/llvm/include/llvm/MC/MCSubtargetInfo.h
index 1dce88e84a..535bcfe2fb 100644
--- a/llvm/include/llvm/MC/MCSubtargetInfo.h
+++ b/llvm/include/llvm/MC/MCSubtargetInfo.h
@@ -96,8 +96,7 @@ class MCSubtargetInfo {
public:
MCSubtargetInfo(const MCSubtargetInfo &) = default;
MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
- StringRef FS,
- ArrayRef<StringRef> PN,
+ StringRef FS, ArrayRef<StringRef> PN,
ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL,
diff --git a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp
index 624206ab96..cd396e6a61 100644
--- a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp
+++ b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp
@@ -16,12 +16,12 @@ using namespace llvm;
TargetSubtargetInfo::TargetSubtargetInfo(
const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS,
- ArrayRef<StringRef> PN,
- ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD,
- const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL,
- const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC,
- const unsigned *FP)
- : MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD, WPR, WL, RA, IS, OC, FP) {}
+ ArrayRef<StringRef> PN, ArrayRef<SubtargetFeatureKV> PF,
+ ArrayRef<SubtargetSubTypeKV> PD, const MCWriteProcResEntry *WPR,
+ const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA,
+ const InstrStage *IS, const unsigned *OC, const unsigned *FP)
+ : MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD, WPR, WL, RA, IS, OC,
+ FP) {}
TargetSubtargetInfo::~TargetSubtargetInfo() = default;
diff --git a/llvm/lib/MC/MCSubtargetInfo.cpp b/llvm/lib/MC/MCSubtargetInfo.cpp
index e41ed5095e..b261707a2b 100644
--- a/llvm/lib/MC/MCSubtargetInfo.cpp
+++ b/llvm/lib/MC/MCSubtargetInfo.cpp
@@ -110,7 +110,7 @@ static void Help(ArrayRef<StringRef> CPUNames,
}
// Determine the length of the longest CPU and Feature entries.
- unsigned MaxCPULen = getLongestEntryLength(CPUNames);
+ unsigned MaxCPULen = getLongestEntryLength(CPUNames);
unsigned MaxFeatLen = getLongestEntryLength(FeatTable);
// Print the CPU table.
@@ -118,8 +118,8 @@ static void Help(ArrayRef<StringRef> CPUNames,
for (auto &CPUName : CPUNames) {
if (CPUName == "apple-latest")
continue;
- errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen, CPUName.str().c_str(),
- CPUName.str().c_str());
+ errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen,
+ CPUName.str().c_str(), CPUName.str().c_str());
}
errs() << '\n';
@@ -160,8 +160,8 @@ static void cpuHelp(ArrayRef<StringRef> CPUNames) {
PrintOnce = true;
}
-static FeatureBitset getFeatures(MCSubtargetInfo &STI,
- StringRef CPU, StringRef TuneCPU, StringRef FS,
+static FeatureBitset getFeatures(MCSubtargetInfo &STI, StringRef CPU,
+ StringRef TuneCPU, StringRef FS,
ArrayRef<StringRef> ProcNames,
ArrayRef<SubtargetSubTypeKV> ProcDesc,
ArrayRef<SubtargetFeatureKV> ProcFeatures) {
@@ -222,7 +222,8 @@ static FeatureBitset getFeatures(MCSubtargetInfo &STI,
void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
StringRef FS) {
- FeatureBits = getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
+ FeatureBits =
+ getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
FeatureString = std::string(FS);
if (!TuneCPU.empty())
@@ -233,20 +234,17 @@ void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef TuneCPU,
StringRef FS) {
- FeatureBits = getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
+ FeatureBits =
+ getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
FeatureString = std::string(FS);
}
-MCSubtargetInfo::MCSubtargetInfo(const Triple &TT, StringRef C, StringRef TC,
- StringRef FS,
- ArrayRef<StringRef> PN,
- ArrayRef<SubtargetFeatureKV> PF,
- ArrayRef<SubtargetSubTypeKV> PD,
- const MCWriteProcResEntry *WPR,
- const MCWriteLatencyEntry *WL,
- const MCReadAdvanceEntry *RA,
- const InstrStage *IS, const unsigned *OC,
- const unsigned *FP)
+MCSubtargetInfo::MCSubtargetInfo(
+ const Triple &TT, StringRef C, StringRef TC, StringRef FS,
+ ArrayRef<StringRef> PN, ArrayRef<SubtargetFeatureKV> PF,
+ ArrayRef<SubtargetSubTypeKV> PD, const MCWriteProcResEntry *WPR,
+ const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA,
+ const InstrStage *IS, const unsigned *OC, const unsigned *FP)
: TargetTriple(TT), CPU(std::string(C)), TuneCPU(std::string(TC)),
ProcNames(PN), ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
WriteLatencyTable(WL), ReadAdvanceTable(RA), Stages(IS),
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index 555b43572d..9bd18f5837 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -20,8 +20,8 @@
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringMap.h"
-#include "llvm/ADT/StringSwitch.h"
#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/StringSwitch.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/MC/MCSchedule.h"
#include "llvm/Support/Debug.h"
@@ -306,9 +306,9 @@ unsigned SubtargetEmitter::cpuNames(raw_ostream &OS) {
std::vector<const Record *> ProcessorList =
Records.getAllDerivedDefinitions("Processor");
-
+
std::vector<const Record *> ProcessorAliasList =
- Records.getAllDerivedDefinitionsIfDefined("ProcessorAlias");
+ Records.getAllDerivedDefinitionsIfDefined("ProcessorAlias");
SmallVector<StringRef> Names;
Names.reserve(ProcessorList.size() + ProcessorAliasList.size());
@@ -324,7 +324,8 @@ unsigned SubtargetEmitter::cpuNames(raw_ostream &OS) {
}
llvm::sort(Names);
- llvm::interleave(Names, OS, [&](StringRef Name) { OS << '"' << Name << '"'; }, ",\n");
+ llvm::interleave(
+ Names, OS, [&](StringRef Name) { OS << '"' << Name << '"'; }, ",\n");
// End processor name table.
OS << "};\n";
@@ -2054,7 +2055,7 @@ void SubtargetEmitter::run(raw_ostream &OS) {
if (NumNames)
OS << Target << "Names, ";
else
- OS << "{}, ";
+ OS << "{}, ";
if (NumFeatures)
OS << Target << "FeatureKV, ";
else
``````````
</details>
https://github.com/llvm/llvm-project/pull/118581
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