[clang] [llvm] Add processor aliases back to -print-supported-cpus and -mcpu=help (PR #118581)
Jon Roelofs via cfe-commits
cfe-commits at lists.llvm.org
Tue Dec 3 18:38:20 PST 2024
https://github.com/jroelofs created https://github.com/llvm/llvm-project/pull/118581
They were accidentally dropped in https://github.com/llvm/llvm-project/pull/96249
rdar://140853882
>From 46775c380244e47ddd9a3188651f37c3a3b33d23 Mon Sep 17 00:00:00 2001
From: Jon Roelofs <jonathan_roelofs at apple.com>
Date: Tue, 3 Dec 2024 18:04:49 -0800
Subject: [PATCH] Add processor aliases back to -print-supported-cpus and
-mcpu=help
They were accidentally dropped in https://github.com/llvm/llvm-project/pull/96249
rdar://140853882
---
clang/test/Driver/print-supported-cpus.c | 10 ++++
.../llvm/CodeGen/TargetSubtargetInfo.h | 4 +-
llvm/include/llvm/MC/MCSubtargetInfo.h | 5 +-
llvm/lib/CodeGen/TargetSubtargetInfo.cpp | 3 +-
llvm/lib/MC/MCSubtargetInfo.cpp | 52 ++++++++++++-------
llvm/utils/TableGen/SubtargetEmitter.cpp | 49 ++++++++++++++++-
6 files changed, 101 insertions(+), 22 deletions(-)
diff --git a/clang/test/Driver/print-supported-cpus.c b/clang/test/Driver/print-supported-cpus.c
index 762c8b5bac1431..a7d0e787259f66 100644
--- a/clang/test/Driver/print-supported-cpus.c
+++ b/clang/test/Driver/print-supported-cpus.c
@@ -2,6 +2,7 @@
// REQUIRES: x86-registered-target
// REQUIRES: arm-registered-target
+// REQUIRES: aarch64-registered-target
// RUN: %clang --target=x86_64-unknown-linux-gnu --print-supported-cpus 2>&1 | \
// RUN: FileCheck %s --check-prefix=CHECK-X86
@@ -25,3 +26,12 @@
// CHECK-ARM: cortex-a73
// CHECK-ARM: cortex-a75
// CHECK-ARM: Use -mcpu or -mtune to specify the target's processor.
+
+// RUN: %clang --target=arm64-apple-macosx --print-supported-cpus 2>&1 | \
+// RUN: FileCheck %s --check-prefix=CHECK-AARCH64 --implicit-check-not=apple-latest
+
+// CHECK-AARCH64: Target: arm64-apple-macosx
+// CHECK-AARCH64: apple-m1
+// CHECK-AARCH64: apple-m2
+// CHECK-AARCH64: apple-m3
+// CHECK-AARCH64: Use -mcpu or -mtune to specify the target's processor.
\ No newline at end of file
diff --git a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
index 23d86248ff87a7..f6d091408ee609 100644
--- a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
@@ -63,7 +63,9 @@ class Triple;
class TargetSubtargetInfo : public MCSubtargetInfo {
protected: // Can only create subclasses...
TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
- StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
+ StringRef FS,
+ ArrayRef<StringRef> PN,
+ ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL,
diff --git a/llvm/include/llvm/MC/MCSubtargetInfo.h b/llvm/include/llvm/MC/MCSubtargetInfo.h
index 9891f1d127f1c1..1dce88e84affb7 100644
--- a/llvm/include/llvm/MC/MCSubtargetInfo.h
+++ b/llvm/include/llvm/MC/MCSubtargetInfo.h
@@ -77,6 +77,7 @@ class MCSubtargetInfo {
Triple TargetTriple;
std::string CPU; // CPU being targeted.
std::string TuneCPU; // CPU being tuned for.
+ ArrayRef<StringRef> ProcNames; // Processor list, including aliases
ArrayRef<SubtargetFeatureKV> ProcFeatures; // Processor feature list
ArrayRef<SubtargetSubTypeKV> ProcDesc; // Processor descriptions
@@ -95,7 +96,9 @@ class MCSubtargetInfo {
public:
MCSubtargetInfo(const MCSubtargetInfo &) = default;
MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
- StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
+ StringRef FS,
+ ArrayRef<StringRef> PN,
+ ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA, const InstrStage *IS,
diff --git a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp
index 6c97bc0568bdee..624206ab962a2e 100644
--- a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp
+++ b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp
@@ -16,11 +16,12 @@ using namespace llvm;
TargetSubtargetInfo::TargetSubtargetInfo(
const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS,
+ ArrayRef<StringRef> PN,
ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC,
const unsigned *FP)
- : MCSubtargetInfo(TT, CPU, TuneCPU, FS, PF, PD, WPR, WL, RA, IS, OC, FP) {}
+ : MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD, WPR, WL, RA, IS, OC, FP) {}
TargetSubtargetInfo::~TargetSubtargetInfo() = default;
diff --git a/llvm/lib/MC/MCSubtargetInfo.cpp b/llvm/lib/MC/MCSubtargetInfo.cpp
index 1de0a9f66669a5..e41ed5095e1086 100644
--- a/llvm/lib/MC/MCSubtargetInfo.cpp
+++ b/llvm/lib/MC/MCSubtargetInfo.cpp
@@ -85,16 +85,22 @@ static void ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature,
}
/// Return the length of the longest entry in the table.
-template <typename T>
-static size_t getLongestEntryLength(ArrayRef<T> Table) {
+static size_t getLongestEntryLength(ArrayRef<SubtargetFeatureKV> Table) {
size_t MaxLen = 0;
for (auto &I : Table)
MaxLen = std::max(MaxLen, std::strlen(I.Key));
return MaxLen;
}
+static size_t getLongestEntryLength(ArrayRef<StringRef> Table) {
+ size_t MaxLen = 0;
+ for (StringRef I : Table)
+ MaxLen = std::max(MaxLen, I.size());
+ return MaxLen;
+}
+
/// Display help for feature and mcpu choices.
-static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
+static void Help(ArrayRef<StringRef> CPUNames,
ArrayRef<SubtargetFeatureKV> FeatTable) {
// the static variable ensures that the help information only gets
// printed once even though a target machine creates multiple subtargets
@@ -104,14 +110,17 @@ static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
}
// Determine the length of the longest CPU and Feature entries.
- unsigned MaxCPULen = getLongestEntryLength(CPUTable);
+ unsigned MaxCPULen = getLongestEntryLength(CPUNames);
unsigned MaxFeatLen = getLongestEntryLength(FeatTable);
// Print the CPU table.
errs() << "Available CPUs for this target:\n\n";
- for (auto &CPU : CPUTable)
- errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen, CPU.Key,
- CPU.Key);
+ for (auto &CPUName : CPUNames) {
+ if (CPUName == "apple-latest")
+ continue;
+ errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen, CPUName.str().c_str(),
+ CPUName.str().c_str());
+ }
errs() << '\n';
// Print the Feature table.
@@ -127,7 +136,7 @@ static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
}
/// Display help for mcpu choices only
-static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
+static void cpuHelp(ArrayRef<StringRef> CPUNames) {
// the static variable ensures that the help information only gets
// printed once even though a target machine creates multiple subtargets
static bool PrintOnce = false;
@@ -137,8 +146,11 @@ static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
// Print the CPU table.
errs() << "Available CPUs for this target:\n\n";
- for (auto &CPU : CPUTable)
- errs() << "\t" << CPU.Key << "\n";
+ for (auto &CPU : CPUNames) {
+ if (CPU == "apple-latest")
+ continue;
+ errs() << "\t" << CPU << "\n";
+ }
errs() << '\n';
errs() << "Use -mcpu or -mtune to specify the target's processor.\n"
@@ -148,7 +160,9 @@ static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
PrintOnce = true;
}
-static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
+static FeatureBitset getFeatures(MCSubtargetInfo &STI,
+ StringRef CPU, StringRef TuneCPU, StringRef FS,
+ ArrayRef<StringRef> ProcNames,
ArrayRef<SubtargetSubTypeKV> ProcDesc,
ArrayRef<SubtargetFeatureKV> ProcFeatures) {
SubtargetFeatures Features(FS);
@@ -163,7 +177,7 @@ static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
// Check if help is needed
if (CPU == "help")
- Help(ProcDesc, ProcFeatures);
+ Help(ProcNames, ProcFeatures);
// Find CPU entry if CPU name is specified.
else if (!CPU.empty()) {
@@ -196,9 +210,9 @@ static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
for (const std::string &Feature : Features.getFeatures()) {
// Check for help
if (Feature == "+help")
- Help(ProcDesc, ProcFeatures);
+ Help(ProcNames, ProcFeatures);
else if (Feature == "+cpuhelp")
- cpuHelp(ProcDesc);
+ cpuHelp(ProcNames);
else
ApplyFeatureFlag(Bits, Feature, ProcFeatures);
}
@@ -208,7 +222,7 @@ static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
StringRef FS) {
- FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
+ FeatureBits = getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
FeatureString = std::string(FS);
if (!TuneCPU.empty())
@@ -219,12 +233,14 @@ void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef TuneCPU,
StringRef FS) {
- FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
+ FeatureBits = getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
FeatureString = std::string(FS);
}
MCSubtargetInfo::MCSubtargetInfo(const Triple &TT, StringRef C, StringRef TC,
- StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
+ StringRef FS,
+ ArrayRef<StringRef> PN,
+ ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL,
@@ -232,7 +248,7 @@ MCSubtargetInfo::MCSubtargetInfo(const Triple &TT, StringRef C, StringRef TC,
const InstrStage *IS, const unsigned *OC,
const unsigned *FP)
: TargetTriple(TT), CPU(std::string(C)), TuneCPU(std::string(TC)),
- ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
+ ProcNames(PN), ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
WriteLatencyTable(WL), ReadAdvanceTable(RA), Stages(IS),
OperandCycles(OC), ForwardingPaths(FP) {
InitMCProcessorInfo(CPU, TuneCPU, FS);
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index 02c799cb6f1471..555b43572df219 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -20,6 +20,7 @@
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringMap.h"
+#include "llvm/ADT/StringSwitch.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/MC/MCSchedule.h"
@@ -91,6 +92,7 @@ class SubtargetEmitter {
void emitSubtargetInfoMacroCalls(raw_ostream &OS);
unsigned featureKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap);
unsigned cpuKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap);
+ unsigned cpuNames(raw_ostream &OS);
void formItineraryStageString(const std::string &Names,
const Record *ItinData, std::string &ItinString,
unsigned &NStages);
@@ -297,6 +299,39 @@ unsigned SubtargetEmitter::featureKeyValues(raw_ostream &OS,
return FeatureList.size();
}
+unsigned SubtargetEmitter::cpuNames(raw_ostream &OS) {
+ // Begin processor name table.
+ OS << "// Sorted array of names of CPU subtypes, including aliases.\n"
+ << "extern const llvm::StringRef " << Target << "Names[] = {\n";
+
+ std::vector<const Record *> ProcessorList =
+ Records.getAllDerivedDefinitions("Processor");
+
+ std::vector<const Record *> ProcessorAliasList =
+ Records.getAllDerivedDefinitionsIfDefined("ProcessorAlias");
+
+ SmallVector<StringRef> Names;
+ Names.reserve(ProcessorList.size() + ProcessorAliasList.size());
+
+ for (const Record *Processor : ProcessorList) {
+ StringRef Name = Processor->getValueAsString("Name");
+ Names.push_back(Name);
+ }
+
+ for (const Record *Rec : ProcessorAliasList) {
+ auto Name = Rec->getValueAsString("Name");
+ Names.push_back(Name);
+ }
+
+ llvm::sort(Names);
+ llvm::interleave(Names, OS, [&](StringRef Name) { OS << '"' << Name << '"'; }, ",\n");
+
+ // End processor name table.
+ OS << "};\n";
+
+ return Names.size();
+}
+
//
// CPUKeyValues - Emit data of all the subtarget processors. Used by command
// line.
@@ -1926,13 +1961,14 @@ void SubtargetEmitter::emitGenMCSubtargetInfo(raw_ostream &OS) {
<< "GenMCSubtargetInfo : public MCSubtargetInfo {\n";
OS << " " << Target << "GenMCSubtargetInfo(const Triple &TT,\n"
<< " StringRef CPU, StringRef TuneCPU, StringRef FS,\n"
+ << " ArrayRef<StringRef> PN,\n"
<< " ArrayRef<SubtargetFeatureKV> PF,\n"
<< " ArrayRef<SubtargetSubTypeKV> PD,\n"
<< " const MCWriteProcResEntry *WPR,\n"
<< " const MCWriteLatencyEntry *WL,\n"
<< " const MCReadAdvanceEntry *RA, const InstrStage *IS,\n"
<< " const unsigned *OC, const unsigned *FP) :\n"
- << " MCSubtargetInfo(TT, CPU, TuneCPU, FS, PF, PD,\n"
+ << " MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD,\n"
<< " WPR, WL, RA, IS, OC, FP) { }\n\n"
<< " unsigned resolveVariantSchedClass(unsigned SchedClass,\n"
<< " const MCInst *MI, const MCInstrInfo *MCII,\n"
@@ -2001,6 +2037,8 @@ void SubtargetEmitter::run(raw_ostream &OS) {
OS << "\n";
unsigned NumProcs = cpuKeyValues(OS, FeatureMap);
OS << "\n";
+ unsigned NumNames = cpuNames(OS);
+ OS << "\n";
// MCInstrInfo initialization routine.
emitGenMCSubtargetInfo(OS);
@@ -2013,6 +2051,10 @@ void SubtargetEmitter::run(raw_ostream &OS) {
<< " TuneCPU = AArch64::resolveCPUAlias(TuneCPU);\n";
OS << " return new " << Target
<< "GenMCSubtargetInfo(TT, CPU, TuneCPU, FS, ";
+ if (NumNames)
+ OS << Target << "Names, ";
+ else
+ OS << "{}, ";
if (NumFeatures)
OS << Target << "FeatureKV, ";
else
@@ -2096,6 +2138,7 @@ void SubtargetEmitter::run(raw_ostream &OS) {
OS << "#include \"llvm/CodeGen/TargetSchedule.h\"\n\n";
OS << "namespace llvm {\n";
+ OS << "extern const llvm::StringRef " << Target << "Names[];\n";
OS << "extern const llvm::SubtargetFeatureKV " << Target << "FeatureKV[];\n";
OS << "extern const llvm::SubtargetSubTypeKV " << Target << "SubTypeKV[];\n";
OS << "extern const llvm::MCWriteProcResEntry " << Target
@@ -2119,6 +2162,10 @@ void SubtargetEmitter::run(raw_ostream &OS) {
<< " AArch64::resolveCPUAlias(TuneCPU), FS, ";
else
OS << " : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, ";
+ if (NumNames)
+ OS << "ArrayRef(" << Target << "Names, " << NumNames << "), ";
+ else
+ OS << "{}, ";
if (NumFeatures)
OS << "ArrayRef(" << Target << "FeatureKV, " << NumFeatures << "), ";
else
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