[clang] [llvm] [RISC-V] Add support for MIPS P8700 CPU (PR #117865)

[Michael Maitland via cfe-commits]

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@@ -1447,6 +1447,23 @@ def TuneConditionalCompressedMoveFusion
 def HasConditionalMoveFusion : Predicate<"Subtarget->hasConditionalMoveFusion()">;
 def NoConditionalMoveFusion  : Predicate<"!Subtarget->hasConditionalMoveFusion()">;
 
+def TuneMIPSP8700
+    : SubtargetFeature<"mips-p8700", "RISCVProcFamily", "Others",
+                       "MIPS p8700 processor">;
+def FeatureMIPSCMov : SubtargetFeature<"xmipscmov", "HasMIPSCMov",
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michaelmaitland wrote:

`FeatureVendorMIPSCMov`? Thats how all the other vendor extensions look.

https://github.com/llvm/llvm-project/pull/117865