[clang] [compiler-rt] [llvm] [XRay][RISCV] RISCV support for XRay (PR #117368)
Min-Yih Hsu via cfe-commits
cfe-commits at lists.llvm.org
Mon Nov 25 15:15:08 PST 2024
================
@@ -453,11 +475,71 @@ bool RISCVAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
SetupMachineFunction(MF);
emitFunctionBody();
+ // Emit the XRay table
+ emitXRayTable();
+
if (EmittedOptionArch)
RTS.emitDirectiveOptionPop();
return false;
}
+void RISCVAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr *MI) {
+ emitSled(MI, SledKind::FUNCTION_ENTER);
+}
+
+void RISCVAsmPrinter::LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr *MI) {
+ emitSled(MI, SledKind::FUNCTION_EXIT);
+}
+
+void RISCVAsmPrinter::LowerPATCHABLE_TAIL_CALL(const MachineInstr *MI) {
+ emitSled(MI, SledKind::TAIL_CALL);
+}
+
+void RISCVAsmPrinter::emitSled(const MachineInstr *MI, SledKind Kind) {
+ // We want to emit the jump instruction and the nops constituting the sled.
+ // The format is as follows:
+ // .Lxray_sled_N
+ // ALIGN
+ // J .tmpN
+ // 29 or 37 C.NOP instructions
+ // .tmpN
+
+ // The following variable holds the count of the number of NOPs to be patched
+ // in for XRay instrumentation during compilation.
+ // Note that RV64 and RV32 each has a sled of 76 and 60 bytes, respectively.
+ // Assuming we're using JAL to jump to .tmpN, then we only need
+ // (76 - 4)/2 = 36 NOPs for RV64 and (60 - 4)/2 = 28 for RV32. However, there
+ // is a chance that we'll use C.JAL instead, so an additional NOP is needed.
+ const uint8_t NoopsInSledCount =
----------------
mshockwave wrote:
Done.
https://github.com/llvm/llvm-project/pull/117368
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