[clang] [llvm] [RISCV] Inline Assembly Support for GPR Pairs ('Pr') (PR #112983)

[Sam Elliott via cfe-commits]

lenary wrote:

> > Gentle Ping. I'm looking for answers to two questions:
> > 
> > * [Should I] prepare a fixup commit that [uses `MVT::Untyped`] (and removes the `riscv_*_pair` MVTs), if we think that's a better target-independent approach?
> 
> I guess so. I didn't know about the SystemZ change before. 

I'll try it, and push a separate commit, so we can see what else is needed.

>
> I do find it a little weird having 2 register classes with the same spill size and registers. I believe the tablegen generated code considers them subclasses of each other. X86 has some register classes like this too so I guess its not a big deal.

I'm not very happy about the duplication either, but it's because of a limitation where fairly early on, selectiondag uses the first legal type in a class, rather than the one you might want.

> > * Any advice on whether I should be digging deeply into changing SelectionDAGBuilder.cpp (affecting all targets) so we don't need the `getNumRegisters` override? The options here IMO are a) live with the override, b) change SelectionDAGBuilder now, c) change SelectionDAGBuilder in a follow-up and remove the override once it is not needed.
> 
> I think we can live with the override since SystemZ is doing it too.



https://github.com/llvm/llvm-project/pull/112983