[clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)

[Petr Penzin via cfe-commits]

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@@ -407,6 +407,54 @@ def SYNTACORE_SCR7 : RISCVProcessorModel<"syntacore-scr7",
                                                FeatureStdExtZkn],
                                               [TuneNoDefaultUnroll, FeaturePostRAScheduler]>;
 
+def TENSTORRENT_ASCALON_D8 : RISCVProcessorModel<"tt-ascalon-d8",
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ppenzin wrote:

With my company hat on I can say that we would prefer tt-ascalon-d8, we use lowercase abbreviation 'tt' in other places. For example our lower level AI stack is referred to as 'tt-metal' (as opposed to 'tenstorrent-tt-metal' or 'tenstorrent-metal')


https://github.com/llvm/llvm-project/pull/115100